IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 23, NO. 6, NOVEMBER 2008 2855 A Buck-Derived Topology With Improved Step-Down Transient Performance Ravinder Pal Singh, Student Member, IEEE, and Ashwin M. Khambadkone, Senior Member, IEEE Abstract—The slew rate of the inductor current is limited by the inductance value and the voltage across the inductor. In a buck converter, when the controller is saturated, the voltage across the inductor during a step-up load transient is V in - V out , while during a step-down load transient, it is -V out . Thus, a buck con- verter with a large conversion ratio offers asymmetrical step-up and step-down transients. Since the rate of fall of the inductor cur- rent is much slower than the rate of rise of the inductor current, the step-down transient lasts longer than the step-up transient for the same change in the load current. The step-down slew rate can be increased by reducing the inductance, but it results in higher inductor current ripple, and hence, higher losses in the power con- verters. In this paper, we present a novel topology for improving the step-down load transients without reducing the inductance value. The scheme operates only during load transients and restores to the normal operating conditions during steady-state operation. It provides reduced voltage overshoots and faster settling times in output voltage during such transients. The proposed scheme is tested on a 1-V/12-A buck converter switching at 1 MHz, and the experimental results are presented. Index Terms—Current-mode control, high slew rates, voltage regulator module (VRM). I. INTRODUCTION A DVANCES in processor technology have posed stringent requirements on the voltage regulator module (VRM) de- sign. The VRMs must deliver low supply voltages with high current while maintaining tight output voltage regulation in the presence of large load transients. The supply voltage of the mi- croprocessor will drop to below 1 V, and the supply current will be around 200 A [1]. For microprocessor loads, high slew rates of VRM output current are expected. In addition, the VRM out- put voltage regulation is required to be less than ±1%. Power supply design becomes challenging under such extreme oper- ating conditions. One such condition occurs in achieving high slew rates in the load current. Due to the presence of load tran- sients with high slew rates, the voltage regulation is affected. During a step-up load transient, a large amount of charge is removed from the capacitor in a very short time. This results in a drop in the output voltage. Similarly, during a step-down load transient, the capacitor absorbs the excess of current so Manuscript received January 8, 2008; revised April 28, 2008. Current version published December 9, 2008. This work was supported by the National Uni- versity of Singapore under the Academic Research Grant R-263-000-305-112. Recommended for publication by Associate Editor Y.-F. Liu. The authors are with the Center for Power Electronics, Department of Elec- trical and Computer Engineering, National University of Singapore, Singapore 117576 (e-mail: rpsingh@nus.edu.sg; eleamk@nus.edu.sg). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TPEL.2008.2005383 Fig. 1. Charging and discharging of the output capacitor during sudden change in load current. as to meet the load current demand. This results in a voltage overshoot if the capacitor cannot absorb the required current sufficiently fast. In a buck converter, the inductor voltage deter- mines the slew rates during step-up (ρ 1 ) and during step-down load transients (ρ 2 ), as illustrated using Fig. 1. Due to different slew rates, an asymmetrical transient response occurs during increase and decrease in load. The slew rates depend upon the voltage across the inductor and are given as ρ 1 = di L dt | up = V in − V out L (1) ρ 2 = di L dt | down = − V out L . (2) For a given change in load current (ΔI o ), the time taken by the inductor current to attain the new value will be T up =ΔI o /ρ 1 and T down =ΔI o /ρ 2 , respectively. The step-down transient will last longer than the step-up transient if it satisfies the fol- lowing condition: T down >T up (3) ΔI o ρ 2 > ΔI o ρ 1 (4) ΔI o L V out > ΔI o L V in − V out . (5) This can be simplified as V in > 2V out . (6) Since (6) is normally the case for a low-conversion-ratio buck converter, the rate of increase of the inductor current is much higher as compared to the rate of decrease of the inductor cur- rent. Thus, for a given change in load current, the charge supplied 0885-8993/$25.00 © 2008 IEEE