1549-7747 (c) 2018 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information. This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TCSII.2018.2884657, IEEE Transactions on Circuits and Systems II: Express Briefs A6μW ±50ppm/ ◦ C ±1500ppm/V 1.5MHz RC Oscillator using Self-Regulation Tianyu Wang * , Danielle Griffith † , Mostafa G. Ahmed * , Junheng Zhu * , Da Wei * , Ahmed Elkholy * , Ahmed Elmallah * and Pavan Kumar Hanumolu * * University of Illinois at Urbana-Champaign, Urbana, IL, 61801, USA † Texas Instruments, Dallas, TX, 76177, USA Abstract—A low power RC relaxation oscillator with very low voltage and temperature sensitivities is presented. Supply sensi- tivity is reduced by using a self-regulation loop that biases the oscillator near its zero-voltage coefficient point. Fabricated in a 65nm CMOS process, the prototype 1.5MHz oscillator consumes 6μW from 1V supply and achieves better than ±50ppm/ ◦ C and ±1500ppm/V temperature and voltage sensitivities, respectively. Index Terms–RC relaxation oscillator, voltage sensitivity, regulation, zero voltage coefficient. I. I NTRODUCTION RC oscillators have become the de-facto clock genera- tors for time keeping and ultra-low power clock generation in applications such as implantable devices, sensors, radio frequency identification (RFID) devices and ultra-low power micro-controller units (MCUs). Compared to crystal oscilla- tors, they offer better tradeoffs in terms of power and area, especially in cost sensitive or power constrained applications. However, their frequency stability is sensitive to factors such as aging, trim accuracy, temperature and (supply) voltage variations. Recent published works have achieved RC oscil- lators with excellent frequency stability over temperature and low Allan deviation floor. While both these parameters are important, frequency sensitivity to supply voltage must also be considered, particularly for highly integrated wireless MCUs where the supply voltage is varied to optimize MCU power and speed. Typically, systems require oscillator frequency variation to be less than 1%, including all the error sources, such as aging (10 years, 100% duty cycle at 85 ◦ C), temperature variation (0 to 85 ◦ C), and supply voltage variation (>300mV). One way to address inadequate frequency stability is through periodic frequency recalibration using a crystal oscil- lator. The crystal oscillator (XO) that is powered down during long periods of inactivity is turned on periodically and used to calibrate the integrated RC oscillator. Using XO as the reference, RC oscillator frequency is locked to the stable XO frequency using a frequency-locked loop arrangement. Once frequency lock is achieved, XO is turned off to save power and the RC oscillator is used as the frequency reference. While this method is simple to implement and effective, large power consumption of the XO and its long turn-on increase system power during the off state. Improving frequency stability of RC oscillators in the presence of both temperature and supply voltage variations can help make recalibration less frequent or even entirely eliminate the need for it. To this end, we T I Q Q S R V V v     C(T) R(T) C(T) I I Fig. 1: Simplified RC oscillator and its imperfections. first evaluate mechanisms that cause frequency inaccuracy and describe design tradeoffs in overcoming them. Consider the simplified block diagram of an RC oscillator shown in Fig. 1, that illustrates all the major error sources. Oscillation period, T OSC , can be shown to be equal to: T OSC = (2IR + V OS1 +V OS2 ) · C I B + 2T D , (1) where V OS1 and V OS2 are the input-referred offset voltages of the two comparators, and T D is delay incurred in resetting the capacitor. Equation 1 captures the three major imperfections that alter T OSC from its nominal value. First, temperature dependence of the resistor and capacitor directly causes T OSC to vary with temperature. Such variation can be mitigated to a large extent by using a metal capacitor and implementing the resistor with a combination of resistors that have oppos- ing temperature coefficients [1]. Second, comparator offset voltages change T OSC by ΔT osc = (VOS1+VOS2)·C IB . While trimming can be used to cancel the effect of static offset voltages, it does not address dynamic variation of V OS1,2 due to temperature. On the other hand, increasing bias cur- rent, I B , can reduce the impact of V OS1,2 , but this method is constrained by the power consumption and the available voltage swing. Voltage-averaging feedback [2], chopping [3], and offset cancellation [4] have also been shown to be effective in mitigating the detrimental impact of V OS1,2 . The third factor that contributes to frequency inaccuracy is the comparator delay, T D . The increase in T OSC caused by static delay can be easily accounted for by trimming either R or C but mitigating frequency inaccuracy caused by dynamic variation of T D due to temperature and supply voltage is challenging. One possible way to overcome this is by simply decreasing T D to be much