AUO-General AUO-General A 120Hz 1G1D 8k4k LCD with Oxide TFT ChiaMing Chang*; ChiaHsiu Tsai*; You, Jian-Jin*; Wei Lai*; Tsung-Shou Chin*; Hsien-Kai Tseng*; Yuzuo Lin*; Hao Yu Wang*; BoLiang Yeh*; ChenChung Wu*; DeZhang Teng*; Chunlin Chen*; Chunhao Su*; Yiyun Huang*; ChunNan Lin*; WenBin Wu*; ManHong Na** *Device Tech. Develop. Div. III, AU Optronics Corp. Hsinchu Science Park, Hsinchu 300, Taiwan, R.O.C. **Technology Development, AU Optronics Corp. Hsinchu Science Park, Hsinchu 300, Taiwan, R.O.C. Abstract We succeeded the true 1G1D 75” 8K4k LCD with Oxide thin- film transistor (TFT) for the first time. The initial prototype TFT process was in Gen.6 FAB, but now, we have been developed mass producible back channel etching (BCE)-type oxide TFT process in Gen.7 FAB. As its first application, 1.7μsec pixel chargeable 1G1D 120Hz 8-domain LCD without any additional compensation part for image quality deterioration such as transmittance loss and color washout is introduced. In practical point of view, this technology can render about 20% reduction of total production material cost compare to a-Si technology. Moreover, simplified 1G1D metal line structure can contribute to production yield improvement. In this report, we present the latest AUOs Oxide TFT backplane development. Author Keywords Oxide TFT; 8k4k; 1G1D; 120Hz; 8-domain; LCD. 1. Introduction We have successfully developed the first time mass-producible oxide TFT process for large size display in AUO since the undertaking development in 2011. The first prototype oxide TFT process was for 4k resolution display in Gen.6 FAB in 2013 [1]. Then, now it is integrated to Gen.7 for the ultra-high resolution display, 8k4k LCD TV for the future emerging display technology as shown in Fig.1. However, the ultra-high resolution display suffers rack of pixel charging time and heavy capacitive load. Thus, higher mobility of oxide TFT and lower resistance of thicker Cu metal bus line are must elements. In practical, the increase of material consumption directly links to additional product cost and encounters process technology limit. Hence, we adopted the minimized process change, simplified process architecture, and integrated process. Now, we overcome the several technical obstacles and report our latest oxide TFT process technology for large-screen, ultra-high resolution display. Figure 1. 75” 8k4k 120Hz 1G1D Panel Specification Screen size 75 inch Resolution 7680 x RGB x 4320 Pixel Size 71.62um x RGB x214.87 um Pixel Density 118 ppi LC Mode 8-Domain, VA mode (PSA) TFT Oxide TFT +GOA PA BCE Frequency 120Hz Signal input 1G1D Table1. 75” 8k4k 120Hz 1G1D Panel Specification. 2. Oxide TFT Fabrication Our oxide TFT structure is illustrated in Fig.2 (b). The Gen.7 size glass was used as the substrate. First, 600nm thick copper (Cu) as a gate metal was deposited by dc-sputtering. A 400nm thick SiNx/SiOx bi-layer gate insulator (GI) was deposited by PECVD at 380 o C on top of patterned gate electrode, respectively. A 100nm oxide film (In-Ga-Zn-O) was grown on GI surface by ac-sputtering at room temperature. The source and drain electrodes were formed by top contact Mo/Cu/Mo tri-layer by wet etching and photolithography. The channel dimension, W/L is 7.5μm/4.5μm. Finally, 300nm thick SiOx/SiNx bi-layer passivated TFT by PECVD at 200 o C. Color photo resister and organic layer were added for display performance. An organic insulating film is patterned by dry etching to form a hole for contact to pixel. Finally, a pixel electrode is contacted via hole. 3. Process Architecture Applying higher resolution and faster driving to display, the required Cu thickness becomes thicker and thicker as shown in Fig.2. In fact, it’s beyond the technical limit yet. Thus, the gate and data metal direct contact method is adopted for the process architecture of lowering metal bus line resistance. As shown in Fig.2, using gate bus metal line (M1), reduce RC loading of data bus line (M2). The effective RC loading reduction corresponds to 1μm Cu thickness. Fig.3 illustrates the data waveform of our 75” 8k4k display. The delay performance is comparable to single 1μm thickness of Cu. In addition, hybrid passivation process was applied to suppress the conflicted characteristic shift of active pixel and GOA (gate driver on array) TFTs. In general, pixel and GOA TFT undergo the electrical bias stress of opposite polarity during the normal operation. ISSN 0097-996X/19/4802-0882-$1.00 © 2019 SID 62-3 / C.-M. Chang 882 • SID 2019 DIGEST