Microelectronic Engineering 59 (2001) 405–408 www.elsevier.com / locate / mee Studies of mist deposited high-k dielectrics for MOS gates a a a a a b D.-O. Lee , P. Roman , C.-T. Wu ,W. Mahoney , M. Horn , P. Mumbauer , b b a, * M. Brubaker , R. Grant , J. Ruzyllo a Department of Electrical Engineering and Nanofabrication Laboratory, Penn State University, University Park, PA 16802, USA b Primaxx, Inc., Allentown, PA 18106, USA Abstract This paper presents the results of the characterization of high-k dielectric films deposited by liquid source misted chemical deposition (LSMCD) in a cluster tool for advanced MOS gates. Electrical characterization (capacitance–voltage and current–voltage) was performed in conjunction with atomic force microscopy (AFM). The effects of in situ surface conditioning prior to deposition were also examined. Among processes investigated, the sequence depositing high-k dielectric, e.g. SrTa O , on nitrided oxide interlayer grown by a UV/ NO process showed very good promise.  2001 2 6 Published by Elsevier Science B.V. Keywords: High-k; LSMCD; Alternate gate dielectric; Gas phase clean 1. Introduction In order to assure the required capacitance of the MOS gate stack in devices featuring geometries below 0.1 mm an extensive search for dielectrics with dielectric constant k higher than that of SiO 2 (3.9) and other characteristics meeting the stringent requirements of MOS gates is currently underway. Among several compositions considered of prime interest are those which feature k higher than 15, are thermodynamically stable with silicon, can be obtained as low-leakage films in the 4–5 nm thickness regime, and maintain their structural integrity during post-deposition annealing cycles. A broad range of materials and deposition techniques is being explored to identify those producing gate dielectrics suitable for next generation CMOS devices. The liquid source misted chemical deposition (LSMCD) method has been successfully employed in the deposition of low-k interlayer dielectrics [1] as well as high-k dielectrics for storage capacitors and ferroelectric RAMs (FRAMs) [2]. In this work we investigate electrical and material characteristics of high-k materials for MOS gates deposited using this method. The materials studied include ZrO and 2 HfO as well as SrTa O [3,4]. 2 2 6 *Corresponding author. Tel.: 1 1-814-865-5193; fax: 1 1-814-865-7065. E-mail address: jxr6@psu.edu (J. Ruzyllo). 0167-9317 / 01 / $ – see front matter  2001 Published by Elsevier Science B.V. PII: S0167-9317(01)00676-1