1 A Simple Approach to the Realization of an FPGA- based Harmonic Elimination PWM Generator Woei-Luen Chen Member, IEEE Yung-Ping Feng Chun-Hao Pien Dept. of Electrical Engineering Chang Gung University, Taiwan, R.O.C. wlchen@mail.cgu.edu.tw Abstract-This paper presents a low-cost and effective approach to generate harmonic elimination PWM (HEPWM) waveforms for three-phase voltage-sourced inverters (VSIs). In the developed approach, the off-line computations of switching patterns based on harmonic elimination strategy are stored in EPROM, thereby allowing a microprocessor-free design. With the proposed configuration, the circuits for the adjustments of modulation index and phase angle are synthesized onto a field- programmable gate array (FPGA) by means of hardware description language (VHDL). Since the VHDL statements, contrary to regular microprocessor programs, are inherently concurrent, high-speed response for determination of circuit output (switching state associated with the specified modulation index and phase angle) can be achieved. Furthermore, in order to limit switching losses for high power applications, eight switching sets having switching angles from 3 to 17 (M=2N+1, N=1…8) in each quarter fundamental period are available. Experimental and simulation results are presented to verify the effectiveness and accuracy of the proposed configuration. Index Terms—EPROM, FPGA, HEPWM, VSI, VHDL. I. INTRODUCTION It is well known that inverters operated at high switching frequency can reduce harmonic distortions and decrease the size of output filter. However, further improvement on harmonic distortion by raising the switching frequency is unrealistic because high power, fast switching device are not available. Several modulation strategies have been developed for VSIs including the following: sinusoidal PWM (SPWM), space vector PWM (SVPWM), harmonic eliminated PWM (HEPWM), and square-wave switching. The conventional sinusoidal PWM can be obtained by comparing a sinusoidal control signal with a triangular waveform. The frequency of the triangular waveform establishes the inverter switching frequency and is generally higher than the inverter output frequency. The high frequency switching results in a substantially lower harmonic distortions compared to the square-wave switching. However, except for the significant drawback of switching losses, the maximum available amplitude of the inverter output voltage corresponding to the SPWM in the linear range (modulation index m i ≦1) is lower than the others. If the modulation index exceeds unity, SVPWM and HEPWM techniques are alternatives for the modulation index lower than 1.15 [1-10]. Although higher modulation index (m i >1.15) is attainable by repeating the tactics of SPWM or square-wave switching, the voltage quality will be scarified in that manner. Furthermore, since the notches are suppressed in the range of overmodulation, the switching rate of SPWM is limited and can only be operated at medium frequency as shown in Fig. 1. In order to make up defects of the SPWM as mentioned above, the switching frequency of the SVPWM inverter is selected to be greater than that of the HEPWM. The operational principle of an SVPWM generator is based on the configuration of the inverters. For a three-phase VSI which consists of three legs, one for each phase. Therefore, only eight combinations (states) are possible. Since two of these states are null vectors, the vector space can thus be divided into equal sectors by the left six states (active vectors). Any voltage vector in this vector space can be synthesized by two active and one null voltage vectors according to the time control of each switching state. Based on this time control rule, the switching sequence may not be unique. The annoying common mode voltage caused by conventional PWM switching can be reduced by taking the advantage of the flexible assignment of the switching sequence within each switching cycle [11-12]. The SVPWM generator can be realized by a low-cost chip set which has the capability in determining the pulse width of the SVPWM waveform [9]. The most attractive feature of HEPWM technique is an inherent compromise to the usual confliction between inverter switching frequency and harmonic distortions. A number of papers have been published on the implementation of HEPWM waveforms [2-7]. Even though that various algorithms developed for calculating the near optimal switching angles were possessed of a fast and efficient realization in a microprocessor-based controller [4- 5], yet the apparent time delay due to sequential programs is still inevitable. This paper describes a digital realization of an HEPWM generator by using FPGA as a kernel controller. The controller is essentially a look-up table which consists of a synchronous circuit, a clock control circuit, and a lockout circuit. The off-line calculated switching patterns are stored in the EPROM and will be picked out according the given modulation index and phase angle. m i SPWM /SVPWM HEPWM SPWM Square wave 0.0 1.0 1.15 3.24 high low med. sw. rate SVPWM Figure 1. Summary of PWM generator capabilities.