IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, VOL. 59, NO. 8, AUGUST 2010 2123 A Measurement Technique for Verifying the Match Condition of Assembled RFID Tags Sung-Lin Chen, Student Member, IEEE, Ken-Huang Lin, Member, IEEE, and Raj Mittra, Life Fellow, IEEE Abstract—In radio frequency identification (RFID) tag design, many measurement methods are available for individually char- acterizing either the RFID chip or the antenna; however, to the best of the knowledge of the authors, no direct method has been developed for the assembled RFID tag. In this paper, a measure- ment method for verifying the match condition of the assembled RFID tag is proposed. The proposed method can not only verify the final impedance match condition of the assembled RFID tags but also be used to identify the resistance and reactance mismatch condition between the RFID chip and the antenna. Furthermore, the measurement data obtained from the verification method can be used to estimate the assembly error introduced by different mounting methods. The use of the corrected circuit model of the RFID chip impedance, which includes the assembly error, helps improve the accuracy of the RFID tag design. Five RFID tag antennas, each with a different complex impedance, are used to verify the proposed method. This paper compares the simulated and measured results to illustrate the application of the proposed verification method to the aforementioned RFID tag antennas. It is shown that the experimental tests for the maximum read range agree well with the measured data generated by using the proposed verification method. Index Terms—Impedance match verification, impedance measurement, integrated circuit modeling, microwave measure- ment, radio frequency identification (RFID), RFID tag, RFID tag antennas. I. I NTRODUCTION R ADIO frequency identification (RFID) technology is used for object identification and has been an emerging re- search and development issue in recent years because of the many potential advantages of the technology to retail, trans- portation, manufacturing, and supply chain management. An RFID system is comprised of tags, readers, and an information management platform. The tag consists of an RFID chip and an antenna, which transforms the received electromagnetic fields into electrical energy for the chip and sends out the digital infor- mation embedded within it back to the reader. The interaction between the chip and the antenna is one of the most important design issues, and a successful RFID tag design is determined Manuscript received April 9, 2009; revised August 13, 2009; accepted August 30, 2009. Date of publication October 30, 2009; date of current version July 14, 2010. This work was supported by the Aim for Top University Plan of the National Sun Yat-Sen University and the Ministry of Education, Taiwan. The Associate Editor coordinating the review process for this paper was Dr. Sergey Kharkovsky. S.-L. Chen and K.-H. Lin are with the Department of Electrical Engi- neering, National Sun Yat-Sen University, Kaohsiung 80424, Taiwan (e-mail: xview@ms77.hinet.net). R. Mittra is with the Department of Electrical Engineering, Pennsylvania State University, University Park, PA 16802 USA. Digital Object Identifier 10.1109/TIM.2009.2032961 Fig. 1. Normalized Friis formula functions of the PTC parameter. by the complex conjugate match realized between the chip and the antenna. This can be observed from the Friis formula [1], [2] D Friis = k Friis √ τ t , where k Friis = λ 4π  P r G r G t P t (1) where D Friis is the predicted maximum read range, λ is the wavelength, P r is the radio power of the reader, G r and G t are the antenna gains of the reader and tag antennas, respectively, and, P t is the sensitivity of the RFID chip. Fig. 1 shows the D Friis curve, which is normalized to k Friis and is a function of the power transmission coefficient (PTC) τ [3]. We note, from the aforementioned figure, that if the PTC value is less than 0.5, the read range can be improved by about 30%; therefore, it is important for us to know whether the design is a good match or not, particularly when the impedance value used for the RFID chip is incorrect or uncertain. For instance, some designers use different [4], [5] or incorrect [6], [7] impedance values for the same RFID chip model to design RFID tags. In the worst case, the design based on an incorrect impedance value can result in a PTC of less than 0.1, severely limiting the usefulness of the design. If, instead, designers have a direct verification method for the impedance-matching condition of the assembled RFID tag, they can precisely design their RFID tags and make sure that the designed RFID tags are in good matching condition. During the process of RFID tag design, the specifications of the RFID chip are either provided by the supplier or are mea- sured by the designer using a load-pull measurement procedure [8]–[10], which is a fairly involved process. Nikitin et al. [11] 0018-9456/$26.00 © 2009 IEEE