Low-Voltage Low-Power Current Monitor for Deep-Submicron Testing I. Pecuh 1* M. Margala 2 and V. Stopjaková 3 1 Electrical and Computer Engineering Department, University of Alberta, Edmonton, Alberta, Canada, email: ipecuh@ee.ualberta.ca, 2 Electrical and Computer Engineering Department, University of Rochester, Rochester, New York, USA, email: margala@ece.rochester.edu, phone: 716-275-2125, fax: 716-275-2073 3 Department of Microelectronics, Slovak Technical University, Bratislava, Slovakia, email: stopjak@elf.stuba.sk ABSTRACT An On-chip low-power circuit for both quiescent current - I DDQ and transient current - I DDT monitoring is presented. The current monitor performs faster and is significantly smaller than previously reported. The monitor is designed for low-voltage digital CMOS circuits (1.5 V). The same design can be used in testing of analog and mixed signal circuits. The effect on the circuit under test performance is negligible. Testing speed of up to 25 MHz can be achieved (including the 4-bit A/D converter, 100MHz without the converter). The monitor has been implemented in 0.5μm and 0.35μm CMOS technology and successfully tested on parallel chains of inverters as circuit under test (CUT). Two types of faults (an open and a short fault) have been observed. Simulation and experimental results are included and analyzed.