Aging Studies of Cu–Sn Intermetallics in Cu Micropillars Used in Flip Chip Attachment onto Cu Lead Frames MARIA PENAFRANCIA C. ROMA, 1 SANTOSH KUDTARKAR, 2 OLIVER KIERSE, 3 DIPAK SENGUPTA, 2 and JUNGHYUN CHO 1,4 1.—Materials Science and Engineering Program, Binghamton University, 85 Murray Hill Rd., Binghamton, NY 13902, USA. 2.—Analog Devices Inc., 804 Woburn St., Wilmington, MA 01887, USA. 3.—Analog Devices International, Raheen Business Park, Limerick V94 RT99, Ireland. 4.—e-mail: jcho@binghamton.edu Copper micropillars plated onto a silicon die and soldered with Sn-Ag solder to a copper lead frame in a flip chip on lead package have been subjected to high- temperature storage at 150°C and 175°C for 500 h, 1000 h, and 1500 h. Cu 6 Sn 5 and Cu 3 Sn intermetallic compounds were found on both sides of the solder, but the growth rates were not the same as evidenced by different values of the growth exponent n. Cu and Sn diffusion controlled the Cu 3 Sn growth in the Cu pillar interface (n 0.5), while interface reactions controlled the growth in the Cu lead frame interface (n 0.8). Increasing the aging temperature increased the growth of Cu 3 Sn as well as the presence of mi- crovoids in the Cu lead frame side. Adding Ni as a barrier layer on the Cu pillar prevented the growth of Cu 3 Sn in the Cu pillar interface and reduced its growth rate on the lead frame side, even at higher aging temperatures. Key words: Intermetallic compounds, Cu micropillars, flip chip, Sn-Ag solders, thermal aging, Cu-Sn, Cu-Ni-Sn INTRODUCTION Copper micropillar bumping has been used as an alternative to wire bonding in chip interconnection technology due to the advantages it offers with fine bond pitch application for high-density performance devices. 1,2 Cost reduction benefits as a result of the use of copper have driven the use of micropillar bumps for flip chip technology. Moreover, miniatur- ization drives the development of three-dimensional (3D) packages, which require integrated circuit (IC) chips to be stacked on top of each other and interconnected by Pb-free soldered micropillars. A potential problem in these interconnects is complete conversion of solder to intermetallic compounds (IMCs), which are known to be brittle and have become a reliability concern, especially for high- temperature applications. 38 When Sn-based sol- ders are connected to Cu pillars or lead frames, Cu 6 Sn 5 is formed initially by a solder reaction. Thermal aging at elevated temperatures not only causes Cu 6 Sn 5 to grow but also Cu 3 Sn to form by solid- state reaction. Although the presence of IMCs indi- cates that a joint has been successfully made between the die and the substrate, the mechanical, thermal, and electrical properties of the joint, which are different from those of the solder and substrate, pose new reliability problems. A study by the National Institute of Standards and Technology (NIST) 9 showed that these IMCs are hard and brittle but with no expected plastic deformation that could result in cracking due to stress concentrations at or near the interface between solder and the intermetallic. A more serious concern is the voiding that occurs during Cu 3 Sn formation. 7,10,11 Excess void forma- tion increases the potential for brittle interfacial failure. 10,11 Several explanations have been given regarding the origin of these voids, and one common citation is due to the Kirkendall effect as seen in the Cu–Sn diffusion experiment of Paul et al., 12 where voiding is due to the difference in the diffusivities of Cu and Sn in Cu 3 Sn resulting in agglomeration of (Received February 9, 2017; accepted October 10, 2017; published online October 31, 2017) Journal of ELECTRONIC MATERIALS, Vol. 47, No. 2, 2018 DOI: 10.1007/s11664-017-5872-3 Ó 2017 The Minerals, Metals & Materials Society 1694