Control of a Three-phase Four-wire Inverter Liping Zheng and Dong Le Calnetix Technologies LLC Cerritos, CA, USA lzheng@calnetix.com and dle@calnetix.com Abstract— In this paper a three-phase four-leg voltage source inverter operating in island mode is described. The four-leg inverter is implemented by using a delta/wye or ZigZag transformer to meet isolation requirement. The control scheme includes an inner current loop providing the capability of fast current limiting and outer voltage loop. Digital sliding mode control is used for the inner current loop which requires higher bandwidth. The voltage loop is implemented in synchronous frame with selected harmonics cancellation for both positive and negative sequence components. Simulation and test of a 125 kW inverter at various operation conditions are presented to verify the validity of the control method. Index Terms—Three-phase, Island mode, Harmonics cancellation, Current control, Voltage control, Uninterruptible power systems, Pulse width modulation, Inverters, Synchronous frame, Stationary frame. I. INTRODUCTION There have been increasing demand for ac power supplies or uninterruptible power supplies (UPS) having low voltage distortion. The voltage distortion which is mainly caused by nonlinear and unbalanced loads will lead to load failures and reduced reliability of the inverter. Therefore, some standards specify the harmonics distortion requirement for the inverters. The international Electrotechnical Commission (IEC) 62040-3 recommends that the total harmonics distortion (THD) of sinusoidal output voltages shall be less than 8 % [1]. It also specifies the maximum distortion of the individual harmonics. There are lots of literatures talking about the different control schemes to reduce THD. However, it is still challenging to have low THD at nonlinear and unbalanced condition since in conventional control, the voltage loop bandwidth is too low to compensate for harmonics frequencies. Because of the high bandwidth requirements of the voltage loop, even some high-performance feedback control schemes, such as deadbeat control [2]-[5], sliding-mode control [6]-[7], can still have high THD at nonlinear and unbalanced load conditions, although they have very good transient performance under large-signal disturbances. To overcome that, other control schemes have been developed, such as internal model based controller [8], optimal control [9], and repetitive control [10]-[11]. Repetitive control has shown promising results in tracking and rejecting periodic signals. Synchronous frame and stationary frame harmonics cancellation are also widely used to reduce THD when in nonlinear load conditions [12]-[15]. In this design, we describe a new control scheme which use digital sliding mode control (DSMC) for the current loop control in order to have fast current limiting capability which is very crucial when the inverter is running in island mode. The voltage loop is implemented in synchronous frame with selected harmonics cancellation for both positive and negative sequence components. The control scheme is very robust to parameter variation and also is easy to be implemented. A 125kW, 480V inverter has been built to verify the control performance. The simulation and test results show very promising performance. II. TOPOLOGY AND CONTROL SCHEME The simplified circuit topology of the developed three- phase four-wire island mode inverter is shown in Fig. 1, where V A is the inverter stage pulse width modulation (PWM) output voltage, I A is the PWM output current, I L is the load current in the transformer primary side, V C is the voltage in the transformer primary side, and V L is the transformer voltage in the secondary side. The isolation transformer which provides three-wire to four-wire conversion can be delta/wye or ZigZag transformer depending on the applications. Fig. 1. Simplified circuit topology of the inverter in island mode operation. The block diagram of the simplified control scheme is shown in Fig. 2. Due to the large current ripple of the PWM output currents, especially at light load condition, two samples synchronized to each PWM cycle is implemented to reduce the switching harmonics of the sampled current signals. Fig. 2. Simplified control schematic.