IEEE ELECTRON DEVICE LETTERS, VOL. 34, NO. 3, MARCH 2013 465 Graphene FETs for Zero-Bias Linear Resistive FET Mixers J. S. Moon, H.-C. Seo, M. Antcliffe, D. Le, C. McGuire, A. Schmitz, L. O. Nyakiti, D. K. Gaskill, P. M. Campbell, K.-M. Lee, and P. Asbeck Abstract—In this letter, we present the first graphene FET operation for zero-bias resistive FET mixers, utilizing modulation of graphene channel resistance rather than ambipolar mixer op- erations, up to 20 GHz. The graphene FETs with a gate length of 0.25 μm have an extrinsic cutoff frequency f T of 40 GHz and a maximum oscillation frequency f MAX of 37 GHz. At 2 GHz, the graphene FETs show a conversion loss of 14 dB with gate-pumped resistive FET mixing, with at least > 10-dB im- provement over reported graphene mixers. The input third-order intercept points (IIP3s) of 27 dBm are demonstrated at a local oscillator (LO) power of 2.6 dBm. The excellent linearity demon- strated by graphene FETs at low LO power offers the potential for high-quality linear mixers. Index Terms—FET, f MAX , f T , graphene, linearity, mixer. W HILE graphene transistors are being developed [1], [2], various ambipolar RF circuit concepts, such as fre- quency multipliers, phase detectors [3], phase-shift-key modu- lation [4], and mixers, are also being tested. Recently, graphene FET-based zero-bias power detectors and W-band radiometers have shown a linear-in-decibel dynamic range with > 20-dB improvement over Si CMOS FETs [5]. In this letter, we present a demonstration of zero-bias linear resistive FET mixers, using graphene FETs with state-of-the-art mixer linearity. The dynamic range and linearity of RF receivers and mixers are critical to today’s communication systems, in detecting weak signals of interest from multiple input and output environ- ments. For RF up- or down-conversion linear mixers, passive resistive FET mixers have been preferred, as compared with active mixers with nonlinear active diodes or FETs [6]. With the local oscillator (LO) signal applied to the gate and the RF signal Manuscript received November 17, 2012; revised December 14, 2012; accepted December 19, 2012. Date of publication February 18, 2013; date of current version February 20, 2013. This work was supported by the Defense Advanced Research Projects Agency (DARPA) and monitored by Dr. J. Albrecht at DARPA under SPAWAR Contract N66001-08-C-2048. The views, opinions, and/or findings contained in this letter/presentation are those of the author/presenter and should not be interpreted as representing the official views or policies, either expressed or implied, of the Defense Advanced Research Projects Agency or the Department of Defense. The review of this letter was arranged by Editor Z. Chen. J. S. Moon, H.-C. Seo, M. Antcliffe, D. Le, C. McGuire, and A. Schmitz are with HRL Laboratories LLC, Malibu, CA 90265 USA (e-mail: jmoon@hrl.com). L. O. Nyakiti, D. K. Gaskill, and P. M. Campbell are with the Naval Research Laboratory, Washington, DC 20375 USA. K.-M. Lee and P. Asbeck are with the University of California, San Diego, CA 92093 USA. Color versions of one or more of the figures in this letter are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/LED.2012.2236533 applied to the drain, the modulation of FET channel resistance with LO provides the desired linear RF mixer performance. The mixer input third-order intercept point (IIP3) follows, as a rule of thumb, 10 dB + LO + Pdc, where Pdc is the total dc power dissipation. Large LO power is therefore often required to achieve high mixer linearity. Various semiconductor transistors, including Si CMOS, InP HEMTs, wide-band-gap SiC and GaN FETs, and carbon nano- tube FETs, have been characterized for linear RF mixers. A 90-nm SOI CMOS resistive FET mixer showed the IIP3 of 20 dBm at a LO power of 10 dBm with a conversion loss (CL) of 9.7 dB [7]. A 90-nm CMOS resistive FET mixer demon- strated the IIP3 of 16.5 dBm at a LO power of 4 dBm with a CL of 11.6 dB [8]. InP HEMTs demonstrated the IIP3 of 6–11 dBm at a LO power of 0 dBm [9]. SiC MESFET-based mixers showed the IIP3 of 38 dBm at a LO drive level of 24 dBm with a CL of 13–16 dB at 2–4.5 GHz [10]. GaN FET-based C-band mixers showed the IIP3 of 30 dBm at a LO power of 23 dBm [11]. Recently, graphene FETs have been characterized for ambipolar mixing at the ∼MHz range [12], [13]. In addition, a graphene-based integrated mixer was demonstrated at 4 GHz [14], and a subharmonic mixer was demonstrated at 2 GHz [15]. So far, the CL of graphene-based mixers was high, i.e., 35–40 dB at 10 MHz and 24 dB at 2 GHz. In [14], the RF was applied to the gate, and the LO signal was applied to the drain (drain-pumped), where the drain was biased at V ds = 2 V. The CL was 27 dB at 4 GHz. So far, a graphene FET was reported with the mixer IIP3 of 13.8 dBm at V ds = 1 V at 10 MHz [12]. In this letter, we show completely passive resistive FET mixer performance in gate-pumped configuration with short- gate-length graphene FETs, for the first time. With no drain bias applied, no dc power dissipation is consumed. The CL of 14–17 dB is demonstrated at 2–10 GHz and 18 dB at 20 GHz. 1 The IIP3 of 27–20 dBm is demonstrated at a LO power of 2.6 to −3.5 dBm at 2–10 GHz, showing a mixer IIP3 > 23 dB + LO. Epitaxial graphene layers were grown on Si-face 6H-SiC substrates on 75-mm wafers via Si sublimation. The sheet elec- tron carrier density of the epitaxial graphene layer was typically ∼8.5 × 10 12 cm −2 at room temperature and had electron mobil- ity of ∼1016 cm 2 /V · s, which was characterized by a noncon- tact Hall Lehighton 1600. Graphene FETs were fabricated using a Ti/Pt/Au source and a drain metal deposition and liftoff pro- cess. The nonalloyed ohmic metal yielded a contact resistance < 0.1 Ω · mm and a contact resistivity of 10 −7 −10 −9 Ω · cm 2 [16]. The metal gates were processed with Ti/Pt/Au on top of an 11-nm-thick HfO 2 gate dielectric layer deposited by atomic 1 We note that the CL of 5 dB is demonstrated at 10 GHz in the case of drain- pumped resistive FET mixing. 0741-3106/$31.00 © 2013 IEEE