Test structure assembly for bump bond yield measurement on high density flip chip technologies M. Ulla ´n a, * , M. Lozano a , M. Chmeissani b , G. Blanchot b , E. Cabruja a , J. Garcı ´a b , M. Maiorino b , R. Martı ´nez a , G. Pellegrini a , C. Puigdengoles b a Centro Nacional de Microelectro ´ nica (CNM-CSIC), Campus UAB, 08193 Bellaterra, Barcelona, Spain b Instituto de Fı ´sica de Altas Energı ´as (IFAE-UAB), Campus UAB, 08193 Bellaterra, Barcelona, Spain Received 8 June 2005; received in revised form 4 October 2005 Available online 15 November 2005 Abstract Modern flip chip technologies for imaging applications have achieved a very high integration level together with the possibility of large area assemblies. These developments have resulted in an enormous increase in the total number of bump bonds per assembly. Consequently, yield tests become difficult, and an accurate measurement of it is often dis- carded. This problem is aggravated in medical applications, where the critical information can be limited to a few pixels, and therefore, yield should be very close to 100%. In these cases, a variation of a small percentage in bump bond yield can make the difference between an usable and a non-usable assembly. Therefore, quantitative and precise measurement of bump bond yield is needed to characterize the quality of any high density flip chip technology for these applications. In this paper, we present a newly developed test structure for electrical measurement of the bump bond yield of high density flip chip technologies, allowing both optimization and statistical control of the process. This test structure facil- itates the identification of possible process deviations with precise quantitative yield measurements. It also allows to pin point any localized systematic failure in the bump bonding process. The test structure has been used to evaluate the yield of different flip chip technologies and has contributed to their fine optimization where necessary. Ó 2005 Elsevier Ltd. All rights reserved. 1. Introduction and relevance Modern detector applications, for X-ray and gamma ray imaging, make use of high density pixel arrays that should be connected with their corresponding readout electronics by means of bump bonding or flip chip tech- nologies. The technology developments achieved lately have increased the density of the pixel arrays by drasti- cally reducing the bump size and the separation between bond pads (pad-pitch). Moreover, the assembly size has increased considerably following a general trend in sili- con technologies. These developments have resulted in an enormous increase in the total number of bump bonds per assembly reaching numbers as high as 1 mil- lion bump bonds per assembly [1]. As this number increases, quality and yield evaluation of the flip chip technologies becomes difficult, and therefore, an accu- rate control of the bump bond yield is often discarded to work merely with general estimations of its value. Test structures and full test chips have been used so far, but only for bond quality tests or for partial yield 0026-2714/$ - see front matter Ó 2005 Elsevier Ltd. All rights reserved. doi:10.1016/j.microrel.2005.10.001 * Corresponding author. Tel.: +34 93 594 77 00; fax: +34 93 580 14 96. E-mail address: Miguel.Ullan@cnm.es (M. Ulla ´n). Microelectronics Reliability 46 (2006) 1095–1100 www.elsevier.com/locate/microrel