926 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: EXPRESS BRIEFS, VOL. 57, NO. 12, DECEMBER 2010 A 10-Gb/s Inductorless Transimpedance Amplifier Omeed Momeni, Student Member, IEEE, Hossein Hashemi, Member, IEEE, and Ehsan Afshari, Member, IEEE Abstract—A new technique to design an inductorless transim- pedance amplifier (TIA) is introduced. This technique uses N similar TIAs in parallel configuration to boost the overall band- width while keeping the transimpedance gain constant. Using this method, we design and implement a 10-Gb/s inductorless TIA with an active area of only 0.06 mm 2 and a differential transimpedance gain of 62 dBΩ in a digital 0.13-μm CMOS process. There is good agreement among the theory, simulation, and experimental results. Index Terms—Bandwidth enhancement, CMOS, feedback, in- ductorless, parallel optical link, transimpedance amplifier (TIA). I. I NTRODUCTION T HERE has been a growing interest in parallel optical links for high-data-rate/bandwidth applications. Microproces- sor units, terabit/s switching systems, multimedia consumer electronics, and optical storage systems are the main applica- tions for parallel optical links and interconnects [1]–[4]. Re- cently, parallel optical links are also considered for chip-to-chip and intrachip interconnections to provide low power dissipation and high-bandwidth operation [5], [6]. The CMOS implemen- tation of optical transceivers is particularly attractive because they can be integrated in the same chip as the digital pro- cessing units, resulting in lower cost and power consumption. Transimpedance amplifier (TIA) is the first gain stage and one of the essential blocks in an optical receiver. The design of a wideband TIA is challenging mainly because it is driven by a photodetector with high capacitance, usually ranging from 0.2 to 0.5 pF. This capacitance often creates the dominant pole of the TIA and hence limits its bandwidth. Inductive peaking is widely used to enhance the TIA bandwidth and makes it possible to reach a data rate of 10 Gb/s and higher in CMOS [2], [7], [8]. However, using inductors to increase the bandwidth of TIA has important drawbacks: 1) the chip size dramatically increases; 2) substrate coupling increases through the inductors, resulting in higher crosstalk; and 3) the TIA performance degrades in a digital process with thin metals and lossy passive components. In parallel optical links, several TIAs and photodetectors are used in parallel to create multiple channels and boost the overall data rate at the receiver [4]. Manuscript received August 5, 2010; accepted October 11, 2010. Date of publication December 3, 2010; date of current version December 15, 2010. This paper was recommended by Associate Editor A. Apsel. O. Momeni and E. Afshari are with the Department of Electrical and Computer Engineering, Cornell University, Ithaca, NY 14853 USA (e-mail: om53@cornell.edu; ehsan@ece.cornell.edu). H. Hashemi is with the Department of Electrical Engineering, University of Southern California, Los Angeles, CA 90089 USA (e-mail: hosseinh@ usc.edu). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TCSII.2010.2087971 Fig. 1. Regular feedback TIA. Therefore, small TIA area and low substrate coupling, which is one of the major sources of crosstalk between the channels, are the key requirements in such a system [9]. In this paper, we introduce a new technique to boost the TIA bandwidth without using any inductor and without changing the transimpedance gain of the TIA. As a proof of concept, we design and implement a 10-Gb/s inductorless TIA in a digital 0.13-μm CMOS process. The TIA provides a differential transimpedance gain of 62 dBΩ and occupies an active area of only 0.06 mm 2 , which is one of the smallest among 10-Gb/s TIAs. II. BANDWIDTH ENHANCEMENT TECHNIQUE Fig. 1 shows a regular feedback TIA. R f is the feedback re- sistor, C D is the photodiode capacitance, and C I is the voltage amplifier input capacitance. A(s) is the transfer function of the voltage amplifier, and assuming it has a single pole, we can write it as A(s)= A 1+ s/ω (1) in which A is the low-frequency voltage gain, and ω is the open-loop pole of the voltage amplifier. Using (1), we can find the transfer function of the feedback TIA in Fig. 1 to be V out I in = A A +1 R f ω 2 n s 2 +2ζω n s + ω 2 n (2) in which ζ = R f (C D + C I )ω +1 2 (A + 1)ω R f (C D + C I ) (3) ω 2 n = (A + 1)ω R f (C D + C I ) . (4) In (2), which is a second-order transfer function, ζ is called the damping factor, and it determines the amount of ringing that appears in the step response of the TIA. If ζ is lower than the critical damping value of ζ = 2/2, ringing appears in the step response corrupting the high and low levels of the data. If ζ> 2/2, the TIA becomes overdamped, and this limits the 1549-7747/$26.00 © 2010 IEEE