362 IEEE TRANSACTIONS ON NANOTECHNOLOGY, VOL. 13, NO. 2, MARCH2014 Mixed-Mode Analysis of Different Mode Silicon Nanowire Transistors-Based Inverter Juncheng Wang, Gang Du, Member, IEEE, Kangliang Wei, Kai Zhao, Lang Zeng, Xing Zhang, Member, IEEE, and Xiaoyan Liu, Member, IEEE Abstract—In this paper, we focused on the comparison and anal- ysis of the performance of inversion-mode (IM), accumulation- mode (AM), and junctionless (JL) silicon nanowire field-effect transistors (NWTs)-based inverter. The effects of the radius, equiv- alent oxide thickness and source/drain doping in the different mode nanowire device structure are investigated. The capacitance com- ponents and transient characteristics, which determine the behav- ior of devices in the circuits, are studied and compared among different mode nanowire devices. The mixed-mode circuit simula- tions have been performed for the inverter circuit and three-stage ring oscillator consist of n-type and p-type IM/AM/JL NWTs. JL NWTs show lower Miller capacitance which contributes to sup- pressing the overshoot effect in the circuits. Results of these simu- lations can give insights into the in-circuit behavior of these future generation devices. Index Terms—Junctionless (JL), mixed-mode circuit simulation, nanowire, transistor. I. INTRODUCTION N OWADAYS, junctionless (JL) silicon nanowire field- effect transistors (NWTs) have been proposed as an alternative to the conventional inversion-mode (IM) and accumulation-mode (AM) NWTs [1]–[5]. The JL devices, with- out source/drain (S/D) junctions and extension regions, with no doping concentration gradients, can simplify the S/D engi- neering and relax the thermal budget during thermal processing steps [2], [3]. Normally, the doping concentration of the JL NWT is uniform throughout the device. The main conduction mech- anism in JL NWTs depends on the bulk current instead of the surface, due to the relatively high doping concentration. Besides, the JL devices exhibit good short-channel characteristics, low off-state leakage current [2], [6] and low gate capacitances [7], making them a very promising candidate for future nanoscale devices. However, a detailed analysis of the small-signal ac and transient behavior in the JL devises, analyzing the differences Manuscript received June 1, 2013; accepted January 27, 2014. Date of publication February 10, 2014; date of current version March 6, 2014. This work was supported in part by the National Fundamental Basic Research Program of China under Grant 2011CBA00604 and in part by the National Natural Science Foundation of China under Grant 60925015. The review of this paper was arranged by Associate Editor A. Ghosh. The authors are with the Key Laboratory of Microelectronic Devices and Circuits, Institute of Microelectronics, Peking University, Beijing 100871, China (e-mail: wangjc@pku.edu.cn; gangdu@pku.edu.cn; gary.weikangliang@ gmail.com; zhaokaipku@gmail.com; Midfieldcommander@gmail.com; zhangx@ime.pku.edu.cn; xyliu@ime.pku.edu.cn). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TNANO.2014.2305577 Fig. 1. Schematic structure of n-type (a) IM NWT, (b) AM NWT, (c) JL NWT, and the structure of (d) inverter circuit, composed of n- and p-type NWT. compared with the IM and AM NWTs upon charging or dis- charging the capacitance components, has not been done. This analysis is especially important for the application of the JL silicon NWTs. Furthermore, a comprehensive investigation of the circuit performance with scaling supply voltage is required for a complete assessment of the different mode silicon NWTs. In order to give insights into the in-circuit behavior of these fu- ture generation devices, we present the simulation results on the performance of IM/AM/JL cylindrical NWTs-based inverter in this paper. The effects of the radius, equivalent oxide thickness, and S/D doping in the different mode nanowire device struc- ture are investigated. The capacitance components and transient characteristics which determine the behavior of the different mode silicon NWTs in the inverter circuit and three-stage ring oscillator (RO) are discussed and compared. The mixed-mode circuit simulations have been made to demonstrate the behaviors and the proper-ties of different mode silicon nanowire transistor- based inverter. II. SIMULATION METHOD AND DEVICE STRUCTURE In our study, the 3-D device simulator sentaurus TCAD tool is used to study the performance of different mode NWTs. The small-signal ac simulation and transient circuit simulation are carried out [8]. Drift diffusion transport models are employed and quantization effects are considered by the density gradient method. The effects of doping concentration, electric fields, and impurity scattering are included in the mobility models [7]. The schematic structures of the IM/AM/JL cylindrical NWTs are plotted in Fig. 1(a)–(c), and the structure of the inverter used for mixed-mode simulation is plotted in Fig. 1(d). The doping concentration of the JL NWT in our simulations is uniform throughout the device, while n-type IM/AM NWTs have an 1536-125X © 2014 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications standards/publications/rights/index.html for more information.