A Flexible, Ultra-Low Power 35pJ/pulse Digital Back-end for a QAC UWB Receiver Marian Verhelst* and Wim Dehaene Katholieke Universiteit Leuven Dept. Elektrotechniek, afd. ESAT-MICAS Kasteelpark Arenberg 10, B-3001 Heverlee, Belgium Email: mverhels@esat.kuleuven.ac.be *M. Verhelst is Research Assistant of the Fund for Scientific Research - Flanders (Belgium)(FWO-Vlaanderen) Abstract— The Quadrature Analog Correlating (QAC) IR- UWB receiver is the ideal candidate for ultra-low power commu- nication in sensor networks. The design of the digital back-end of this UWB receiver is very challenging due to the required high timing precision and flexibility. This paper describes a 0.13μm CMOS design of a QAC IR-UWB flexible digital back-end. A novel architecture, based on nested FLEXmodules, lets flexibility and low power consumption go hand-in-hand. The back-end, running at 80MHz with a 0.95V supply, consumes 35pJ/pulse. This leads to an energy consumption of 700pJ/bit, including acquisition overhead, when receiving 2.67Mbps with 15 pulses per bit. I. I NTRODUCTION Over the last decade, sensor networks started to gain importance in various application domains: from machine and construction monitoring, over asset tracking, to medical surveillance and many more. Key factors to enable these promising applications are a low energy communication link between the nodes and built-in node localization capability. Impulse radio ultra-wideband (IR-UWB [1]) is a low power communication technique in which data is modulated onto very short, wideband pulses. It is an excellent candidate for sensor network communication, due to its robustness against interferers, multi-path and multi-user. Moreover, the short duration of the pulses allows to very accurately monitor the time-of-arrival of the signal [2]. As a result, localization comes almost for free when using IR-UWB communication. The design of the IR-UWB receiver however remains very challenging. The wideband nature of the pulses, results in large bandwidth requirements for the front-end. Additionally, a high timing precision and very accurate synchronization and tracking are needed in the back-end. Many IR-UWB receiver architectures have been presented in literature [3], [4], [5], [6], [7]. In [8] several alternatives are compared in terms of minimal energy consumption per useful received data bit. In this way, the optimal trade-off between the bit-error-rate performance and power consumption is achieved. The first investigated alternative, the fully digital receiver ([5], [6]) samples the wideband pulses at Nyquist rate, allowing all processing to be done in the digital domain. Although this receiver is very flexible and has a superior bit-error-rate performance, it does not offer the best solution. The reason is its high power consumption, caused by the high sampling rates LNA correlator Q I correlator analog analog 90 0 clock gen stop start VGA gain CLK DIGITAL BACK-END ANALOG FRONT-END ADC ADC VGA VGA Q I 4bit 4bit Fig. 1. Architecture of the QAC UWB receiver. in the ADC and digital front-end. The transmitted reference (TR) IR-UWB receiver ([7]) on the other hand benefits from a low complexity and low power implementation, but suffers from large performance degradation due to the noise-cross- noise correlation term. The study concludes that the most energy efficient solution is offered by the Quadrature Analog Correlating (QAC) receiver ([3], [4]). The QAC receiver, shown in figure 1, reduces the sampling rate of the ADC down to pulse rate by implementing the matched filter correlation of the incoming pulses with the pulse template in the analog domain. Unlike in the TR receiver, the correlation template is here locally generated, hence avoiding the large noise-cross-noise term. To lower the receiver complexity and power consumption, the correlation template is finally replaced by a windowed sine. The low complexity correlation in the analog domain results in a low power front-end implementation and allows a low speed digital back-end. The digital back-end however still has to fulfill following crucial tasks with minimal energy consumption: synchronization, data detection, tracking and real-time control of the analog front-end. Moreover, it has to be able to perform these tasks over a wide range of data rates and noise levels, resulting from the various applications. A conservative approach would be to design this receiver for the worst case scenario. This however gives huge power penalties in non-worst case situations. A better approach is to make the digital back-end flexible, so that it can switch between multiple pulse rates, processing gains, frequency bands and acquisition algorithms depending on the requirements and 1-4244-1125-4/07/$25.00 ©2007 IEEE. 236