1549-7747 (c) 2015 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information. This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TCSII.2016.2539081, IEEE Transactions on Circuits and Systems II: Express Briefs Copyright (c) 2016 IEEE. Personal use of this material is permitted. However, permission to use this material for any other purposes must be obtained from the IEEE by sending an email to pubs-permissions@ieee.org Abstract— We developed and fabricated a 0.5-V rail-to-rail operational amplifier (op-amp) with ultra-low-power operation in a 0.18-μm standard CMOS process. The op-amp has a two-stage structure that comprises a complementary input stage and a novel cross-coupled output stage. The cross-coupled output stage increases the transconductances of the MOSFETs of the output stage without requiring additional chip area. Hence, it increases the gain of the op-amp and drivability for a capacitive load. Our experimental results showed that the DC gain was 77 dB at the common-mode input voltage of 0.25 V with a supply voltage of 0.5 V. DC gains of more than 40 dB were obtained for common-mode input voltages ranging 50−450 mV. Furthermore, the unity-gain frequency was 4.0 kHz and phase margin was 56° with a capacitive load of 40 pF. The power consumption was 70 nW including all bias circuits. Index Terms—CMOS analog integrated circuits, low-power design, operational amplifiers, rail-to-rail operation. I. INTRODUCTION N INCREASED number of portable electronic devices, such as smartphones and tablets, are flooding society, and the demand for efficient low-power circuits is increasing just as rapidly due to the required battery operations of these handheld devices. In the field of biomedical applications, a signal acquisition circuit and ΔΣ modulator, which operate with a supply voltage of 0.5 V, are reported [1–2]. Such applications usually require analog and mixed-mode circuits. One of the most important building blocks in analog and mixed-mode circuits is the operational amplifier (op-amp). For more than a decade, low-voltage op-amps operating with a supply voltage of 1 V or less have been investigated [3−9]. In [3], Blalock et al. employed a body-driven input stage for a 1-V rail-to-rail CMOS op-amp. However, the input impedance of the body-driven input stage is lower than that of a gate-driven input stage. In [4], Chatterjee et al. developed a 0.5-V op-amp using the gate inputs with the body terminal for biasing; however, its common-mode input range is considerably limited. In [5], Stockstad et al. proposed a buffered body-driven technique and realized a 0.9-V rail- Manuscript received September 18, 2015; revised December 20, 2015; accepted Feb. 12, 2016. This work is supported by VLSI Design and Education Center (VDEC), the University of Tokyo in collaboration with Synopsys, Inc., Cadence Design Systems, and Rohm Corporation. The authors are with the Department of Electronic Engineering, Saitama Institute of Technology, Saitama 369-0293, Japan (e-mail: d0009xbq@sit.ac.jp; yoshiz_h@ sit.ac.jp). V inn V inp I REF V BIAS1 V X V Y MN3a MN3b MP3a MP3b V BIAS2 V inn V inp V out V DD V DD C C1 C C2 MR1 M1 M2 M3 M4 M5 M6 M7 M8 Fig. 1. Schematic of our rail-to-rail op-amp with a novel cross-coupled output stage. to-rail op-amp that operated at up to 5.5 V. The input impedance here was as high as that of a typical gate-driven op-amp; however, this circuit used depletion-type NMOS transistors, which are usually not available in standard CMOS processes. In [6], Lee utilized native NMOS transistors for the input pair of the first stage to realize a sub-0.5 V rail-to-rail op-amp; however, native NMOS transistors require minor process modifications as compared with a standard CMOS process. In this paper, we describe a 0.5-V rail-to-rail CMOS op-amp, which comprises a cross-coupled output stage to increase both the gain of the op-amp and drivability for a capacitive load. It was presented by authors with simulation-only results for a typical condition in [10]. Now, we have investigated process corners in simulations, fabricated the op-amp using a standard CMOS process, and described the experimental results. II. PROPOSED 0.5-V RAIL-TO-RAIL OP-AMP Fig. 1 shows our proposed rail-to-rail op-amp circuit [10], which is a two-stage op-amp with a complementary input stage and a novel cross-coupled output stage. Here, all MOS transistors operate in their weak-inversion regions. A. Input Stage In the circuit schematic of Fig. 1, minimum common-mode input voltage V CM (min) is described as follows: V CM (min) = V DS3 + V SD1 − V SG1 . (1) 0.5-V 70-nW Rail-to-Rail Operational Amplifier Using a Cross-coupled Output Stage Zhigang Qin, Akihiro Tanaka, Naomi Takaya, and Hirokazu Yoshizawa, Member, IEEE A