Object-based hardware/software component interconnection model for interface design in system-on-a-chip circuits W. Ces ario a, * , L. Gauthier b , D. Lyonnard a , G. Nicolescu a , A.A. Jerraya a a TIMA Laboratory, 46 av. F elix Viallet, 38000, Grenoble, France b Institute of Systems and Information Technologies, Fukuoka SRP Center Building, 7F, 2-1-22, Momochihama, Japan Received 31 December 2002; accepted 11 January 2003 Abstract The design of system-on-a-chip (SoC) circuits requires the integration of complex hardware/software components that are customized to efficiently execute a specific application. Nowadays, these components include many different embedded processors executing concurrent software tasks. In this paper, we present an object-based component interconnection model to represent both hardware and software components within a system architecture in a very high level of abstraction. This model is used in a design flow for automatic generation of hardware/software interfaces for SoC circuits. Design tools for automatic generation of embedded operating systems, hardware interfaces and associated device drivers are presented and evaluated using the results obtained with a VDSL application. Ó 2003 Elsevier Inc. All rights reserved. 1. Introduction The ‘‘International Technology Roadmap for Semi- conductors’’ predicts that the number of processor cores in a system-on-a-chip (SoC) circuit will increase four- fold per technology node (SOC System Driver section, available at http://public.itrs.net/). Multiprocessor SoC (MPSoC) circuits have particularly tight time-to-market and performance constraints requiring a very short and efficient design cycle. Our conceptual model of the MPSoC architecture is composed of four kinds of components: software tasks, processor and intellectual property (IP) cores and a global on-chip interconnect IP. In this paper, we present Colif, an object-based component interconnection model that abstracts this MPSoC architecture as a virtual architecture where hardware/software (HW/SW) components use and/or provide communication services (see Fig. 1a). This model enables independent refinement of component communication and behavior as proposed by (Keutzer et al., 2000; Sangiovanni-Vincentelli et al., 2000). Software and hardware adaptation layers isolate HW/SW components enabling the organization shown in Fig. 1b. The software design team uses application programming interfaces (API) for software develop- ment, and the hardware design team uses abstract in- terfaces that are independent of the communication interconnect IP. The SoC design team can concentrate on implementing hardware and software abstraction layers for the selected communication interconnect IP. Customizations of the communication infrastructure and development of the application code follow inde- pendent paths in the design flow as proposed by (Chang et al., 1999). Designing these HW/SW abstraction layers repre- sents a major effort, and design tools are lacking. In our opinion, HW/SW component integration can be done at a higher level of abstraction if we use a design model that supports three main features: • Flexible modeling of component communication. Hard- ware/hardware, software/software and hardware/soft- ware component communication must be modeled using the same concept. Furthermore, high-level * Corresponding author. E-mail addresses: wander.cesario@imag.fr (W. Ces ario), lovic- gauthier@isit.or.jp (L. Gauthier), lyonnard@imag.fr (D. Lyonnard), gabriela.nicolescu@imag.fr (G. Nicolescu), ahmed.jerraya@imag.fr (A.A. Jerraya). 0164-1212/$ - see front matter Ó 2003 Elsevier Inc. All rights reserved. doi:10.1016/S0164-1212(03)00071-2 The Journal of Systems and Software 70 (2004) 229–244 www.elsevier.com/locate/jss