IEEE TRANSACTIONS ON CIRCUITS & SYSTEMS I, VOL. XX, NO. YY, MONTH ZZ, 2020 1 Piecewise Quadratic Slope Compensation Technique for DC-DC Switching Converters A. El Aroudi, Senior Member, IEEE, K. Mandal, Member, IEEE, M. Al-Numay, Member, IEEE, D. Giaouris, and S. Banerjee, Fellow Member, IEEE Abstract—In this paper, a piecewise quadratic slope compen- sation technique for eliminating subharmonic oscillations in dc- dc switching converters is studied. With this technique, a self- generated signal is used in the compensation scheme resulting in a naturally full duty cycle stability domain. The expression of the piecewise quadratic compensating signal within a switching cycle is derived. It is obtained that the steady-state value of the amplitude of this signal is the same as in the conventional linear slope compensation scheme that guarantees stability for all values of the duty cycle. However, in the piecewise quadratic scheme this is achieved without exact knowledge of the inductance value nor sensing the input and the output voltages. The stability of the converter under the considered compensation scheme is also guaranteed for all values of the duty cycle with voltage loop open. A boost converter under peak current mode control is used to validate the theoretical results both by numerical simulations and by experiments. Simulation results are analyzed and compared to the performances of the state-of-art techniques with voltage loop closed. Index Terms—dc-dc power converters, subharmonic oscilla- tion, slope compensation, current mode control. I. I NTRODUCTION S LOPE compensation using an external sawtooth periodic signal with a constant slope is the conventional strategy used by power electronics engineers for stabilizing switching converters under peak CMC [1], [2]. With this technique a periodic sawtooth signal is subtracted from the reference signal such that by adequately adjusting its slope, the system is A. El Aroudi is with Universitat Rovira i Virgili, Tarragona, Department d’Enginyeria Electrònica, Elèctrica i Automàtica, Spain. K. Mandal is with the department of Electrical and Electronics Engineering, National Institute of Technology Sikkim, Ravangla, South Sikkim - 737139, India. M. Al-Numay is with the Department of Electrical Engineering, King Saud University, Riyadh, Saudi Arabia. D. Giaouris is with School of Electrical and Electronic Engineering, Newcastle University, Newcastle upon Tyne, United Kingdom. S. Banerjee is with Indian Institute of Science Education & Research - Kolkata, Mohanpur Campus, Nadia - 741246, W.B., India. This work has been sponsored by the Spanish Agencia Estatal de Investi- gación (AEI) and the Fondo Europeo de Desarrollo Regional (FEDER) under grants DPI2017-84572-C2-1-R. A. El Aroudi and M. Al-Numay acknowledge financial support from the Reserechers Supporting Project number (RSP- 2019/150), King Saud University, Riyadh, Saudi Arabia. D. Giaouris acknowl- edges the support from the European Union’s H2020 research and innovation programme under the grant agreement No 731268. Banerjee acknowledges financial support in the form of J C Bose Fellowship (no. SB/S2/JCB- 023/2015) by the Science & Engineering Research Board, Govt.of India. Copyright c  2020 IEEE. Personal use of this material is permitted. How- ever, permission to use this material for any other purposes must be obtained from the IEEE by sending an email to pubs-permissions@ieee.org. Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. stabilized. The larger the slope of the ramp the wider is the stability range in terms of the duty cycle [3]–[5]. In order to have a stable system for all values of duty cycles, the slope must be equal to one half the absolute value of the falling slope of the sensed inductor current. In addition to the constant slope compensation, many con- trol methods have been proposed to suppress subharmonic oscillations. Roughly speaking, the suppression of this un- desired behavior can be performed either by shaping the frequency response of the controller [6], [7], by updating the amplitude of the compensation signal in the time domain [8]–[17] or by injecting external stabilizing signals leading to resonant parametric perturbation (RPP) [18], [19]. Time delayed feedback control (TDFC) stabilizes unstable periodic orbits in nonlinear systems by shaping the frequency response of the controller and was applied to suppress subharmonic oscillation in dc-dc converters [20]–[22]. Nevertheless, TDFC cannot be implemented using analog devices. Filter-based stabilization techniques approximating the TDFC using im- plementable filters were proposed in [6], [23]–[25] to stabilize switching converters. In order to eliminate subharmonic oscillation in a dc-dc buck converter under VMC, RPP method was applied in [18] and it was empirically observed that a sinusoidal perturbation can stabilize the system and the effects of phase shift frequency mismatches in the stabilizing signal have been studied. It was also shown that the control effort can be significantly reduced if the stabilizing signal is applied with an appropriate phase shift. In [19], RPP was used for stabilizing a PFC boost con- verter under peak CMC by superposing an external sinusoidal signal to the reference current. The authors have analytically explained why the technique in [18] works, and developed methods for obtaining optimal choice for the stabilizing signal. The main advantage of the RPP technique with phase shift over the RPP method is that the stabilizing signal in the second case is zero if the phase shift is optimized. This also leads to the conservation of the desired peak reference value of the inductor current while having the same stabilizing effect as the RPP. However, the generation of a stabilizing signal with an optimum phase shift and its synchronization with the clock signal is hard from implementation point of view. The zero-perturbation dynamic slope compensation (ZPDC) scheme was proposed to suppress subharmonic oscillation while accurately tracking the current reference by the peak value of the inductor current in a buck converter [8]. This technique was further developed for a boost converter and