A New Linearization Technique for CMOS Low Noise Amplifiers with Balun Circuitry Abstract: In this paper, a new linearization technique for differential low noise amplifiers (LNAs) is introduced. It removes the common-mode current at all frequencies. One of its main advantages is that it allows the receiver to have a single- ended input and a differential output LNA which attenuates even-order inter-modulations. Also, this technique improves the LNA linearity in three ways. Firstly, it removes the common- mode current of all inter-modulations. Secondly, it attenuates even-order inter-modulations because of its balun circuitry operation. Finally, it improves the third input intercept point (IIP3) due to the possibility of different bias currents for input transistors. Simulation results using a 0.18µm RF-CMOS technology with HSPICE-RF show that the IIP3 improves about 13 dBm at the expense of increasing the noise figure about 0.7 dB in constant voltage gain and equal DC-power respected to the conventional differential LNA. Keywords: LNA, inter-modulation, IM2, IM3, IIP2, IIP3, transconductance. 1. Introduction Due to the growth of personal communication devices over the last few years, the design of high performance RF integrated circuits and systems has become more important. During the last years, the development of wireless communication systems and the extension of the usage of wireless devices make the frequency band very noisy and the interference of each band increases due to congestion of the frequency band. So, designers are forced to use more sensitive and highly linear transceivers. In this situation, equipments which work under the same communication standard may suffer from the interference from each other. For example, in the IEEE 802.11 b/g standard, which is for implementing wireless local area network (WLAN) in the 2.4 GHz frequency band, equipment may suffer the interference from microwave ovens, cordless phones and Bluetooth devices. Each IEEE 802.11 b and g has a maximum raw data rate of 11 Mbit/s and 54 Mbit/s over a 20 MHz bandwidth and is very suitable for high speed communication applications. Since the low noise amplifier (LNA) is the first block of the receiver chain, it must be designed with low noise and high linearity so as to increase the sensitivity and linearity of the receiver. There are several linearization methods for LNAs to attenuate the most important nonlinearity components of MOSFETs such as g m and g ds [1]. Differential circuits are common in wireless applications as they can reduce the even-order distortion and the susceptibility to the common-mode (CM) noise [2]. So, differential LNAs are more linear than the single- ended ones and have robust outputs against the process variations. The main concern in this type of LNAs is the need for a balun to provide the differential input signal form the antenna. Passive baluns (also known as transformers) are lossy, bulky and very noisy resulting in a higher noise figure (NF) in the receiver [3]. In this paper, a differential LNA with a balun circuitry and a new technique to enhance the linearity by removing the CM current and attenuating the output second and third order inter-modulation components (IM2 and IM3) is proposed. The paper is organized as follows. Section 2 describes the proposed LNA structure and technique, and provides the noise and linearity analysis. Simulation results of the proposed LNA using a 0.18 µm CMOS process are reported in Sect. 3. Finally, Sect. 4 presents the conclusions. 2. Proposed LNA Structure For any differential-pair LNA such as the one shown in Fig. 1(a), the drain currents I 1 and I 2 in the left and right branches can be written as [3]: 1 CM Diff I I I = + (1) 2 CM Diff I I I = - (2) where I CM is the common-mode current and I Diff is the differential-mode current in a differential-pair amplifier. The idea in this paper is to design an LNA to remove I CM at all frequencies except for DC. As is seen in Fig. Mahdi Barati, Babak MazhabJafari, and Mohammad Yavari Integrated Circuit Design Laboratory, Department of Electrical Engineering, Amirkabir University of Technology, Tehran, Iran Emails: m.barati@aut.ac.ir , babak.mazhabjafari@aut.ac.ir , myavari@aut.ac.ir 978-1-4673-5634-3/13/$31.00 ©2013 IEEE