SSRG International Journal of Electronics and Communication Engineering ( SSRG IJECE ) Volume 3 Issue 8 August 2016 ISSN: 2348 8549 www.internationaljournalssrg.org Page 18 Implementation of Serial Peripheral Interface Protocol for LCD Nivi Jain #1 , Preet Jain *2 1 Department of Electronics and Communication, SVITS, Indore, India 2 Head of Department of Electronics and Communication, SVITS, Indore, India Abstract This work aims at interfacing 16x2 LCD with a small pin count microcontrollers. The proposed system provides the implementation aspects of development of bridge between LCD and limited pin count controller, so that one can even explore microcontroller with limited pin counts for LCD communication. The whole idea is designed using Verilog and implementation is carried on to the FPGA (EP2C70F896-C6) so as to prove the proof of concept. Keywords - Serial peripheral interface (SPI), serial communication, field programmable gate array (FPGA), liquid crystal display (LCD), Arduino. I. INTRODUCTION As we know that a 16x2 LCD has 16 external pins, it operates in two modes i.e. 8 bit mode and 4 bit mode which means that minimum of 6 pins or maximum of 11 pins will be required for proper operation. Since 16x2 LCD has been used from very long time in both the small and big industrial projects. The reason being, LCDs are economical and have no limitation of displaying special and custom characters unlike in seven segments. Also it is very easy to programme and is flexible in nature. If in some project a small controller with low pin count is supposed to utilize then it become difficult to establish communication between LCD and the microcontroller having small pin count. This work deals with solving the problem faced by us, while interfacing LCD and low pin count controller by developing a bridge that interfaces LCD and uses just 2-3 pins of the controller for displaying purpose. For this we have chosen standard SPI protocol at the controller side and 8 bit mode at the LCD side to serve the proper functioning of LCD. Figure 1 shows the bock level interface for setting up the communication. 2-3 10-12 Figure 1 II. LITERATURE REVIEW Many researchers have worked on different methods of communication between two integrated circuits. In which two most common protocols are there, which are quite complimentary for this kind of communication are SPI (Serial Peripheral Interface) and I2C (Inter- integrated Circuit), both these protocols are convenient for slow communication with its peripherals. Two major companies are there, behind these two known protocols: Motorola for SPI and Phillips for I2C [1]. As these two are very different from each other so on comparing these two protocols we find that SPI is more easy to use as it utilizes lower power, lower cost and having high transfer rate as compared to I2C. Also in SPI full duplex data transfer is possible while in I2C only half duplex type of data transfer can be done [2]. SPI already utilizes low power as compared to other devices, but it is possible to make SPI to utilize lower power by changing the designs of SPI. On introducing some additional states like stop state for power conservation and double buffer register to control the overflow of data and also by dividing the clock frequency it is possible to make it lower power device [4]. SPI can handle more than one slave and SPI is already having a full duplex mode of data transmission which makes it high speed interface [3]. Also some researchers have developed a built in self test capability in SPI on same board by pressing a single switch. Thus SPI becomes more flexible, speedy, low cost and stable with respect to other and also it would save time and cost of testing [5]. III. PROPOSED SYSTEM Mainly three blocks are there between which an interfacing is being established. The first one is SPI block this is the master block which initiates the whole process of the data transfer. After receiving the clock pulse from the master device the data transfer will take place between the master and slave device. The second block is SPI-LCD bridge block which is a slave device for SPI. The data/command sent by the master device will save in the slave device. The third block is LCD display. The data sent to the SPI-LCD bridge device is first save in the memory of SPI-LCD bridge and then it will sent to the LCD to display the data. SPI FPGA LCD DISPLAY