5 Compact Modeling of Interconnect Circuits over Wide Frequency Band by Adaptive Complex-Valued Sampling Method HAI WANG, SHELDON X.-D. TAN, and RYAN RAKIB, University of California, Riverside In this article, we propose a new model order-reduction method for compact modeling of interconnect circuits over wide frequency band using a novel complex-valued adaptive sampling and error estimation scheme. We address the outstanding error control problems in the existing sampling-based reduction framework over a frequency band. Our new method, WBMOR, explicitly and efficiently computes the exact residual errors to guide the sampling process. We show by sampling along the imaginary axis and performing a new complex- valued reduction that the reduced model will match exactly with the original model at the sample points. Additionally, we show in theory that the proposed method can achieve the error bound over a given frequency range. In practice, the new algorithm can help designers choose the best order of the reduced model for the given frequency range and error bound via the adaptive sampling scheme. In addition, WBMOR can perform wideband accurate reductions of interconnect circuits for analog and RF applications where model accuracy needs to be maintained over a wide frequency range. We compare several sampling schemes such as Monte Carlo, logarithmic, recently proposed resampling, and ARMS methods. Experimental results on a number of RLC circuits show that WBMOR is much more efficient than all the other sampling methods, including the recently proposed resampling and ARMS schemes with the same reduction orders. Compared with the traditional real-valued sampling methods, the complex-valued sampling method is more accurate for the same computational cost. Categories and Subject Descriptors: J.6 [Computer Applications]: Computer-Aided Engineering— Computer-aided design General Terms: Design, Algorithms Additional Key Words and Phrases: Model reduction, adaptive, complex-valued sampling ACM Reference Format: Wang, H., Tan, S. X.-D., and Rakib, R. 2011. Compact modeling of interconnect circuits over wide frequency band by adaptive complex-valued sampling method. ACM Trans. Des. Autom. Electron. Syst. 17, 1, Article 5 (January 2012), 22 pages. DOI = 10.1145/2071356.2071361 http://doi.acm.org/10.1145/2071356.2071361 1. INTRODUCTION Model order reduction (MOR) is an efficient technique for reducing the complexity of parasitic interconnect circuits. Existing approaches based on the Krylov subspace are very efficient [Antoulas 2005; Feldmann and Freund 1995; Odabasioglu et al. 1998; Silveira et al. 1996]. These methods, which perform implicit moment-matching by This work is supported in part by NSF grants CCF-1116882, OISE-1130402, OISE-1051797 and in part by UC-MEXUSCONACyT Collaborative Research grant (2011-2013). Some preliminary results of this paper appeared in the Proceedings of the 15th Asia and South Pacific Design Automation Conference (ASPDAC) [Wang et al. 2010]. Authors’ address: H. Wang, S. X.-D. Tan, and R. Rakib, Department of Electrical Engineering, University of California, Riverside, CA 92521; email: {hawang, stan, rrakib}@ee.ucr.edu. Permission to make digital or hard copies of part or all of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies show this notice on the first page or initial screen of a display along with the full citation. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permit- ted. To copy otherwise, to republish, to post on servers, to redistribute to lists, or to use any component of this work in other works requires prior specific permission and/or a fee. Permissions may be requested from the Publications Dept., ACM, Inc., 2 Penn Plaza, Suite 701, New York, NY 10121-0701, USA, fax +1 (212) 869-0481, or permissions@acm.org. c  2012 ACM 1084-4309/2012/01-ART5 $10.00 DOI 10.1145/2071356.2071361 http://doi.acm.org/10.1145/2071356.2071361 ACM Transactions on Design Automation of Electronic Systems, Vol. 17, No. 1, Article 5, Publication date: January 2012.