Journal of VLSI Signal Processing, 10, 93-106 (1995) 9 1995 Kluwer Academic Publishers, Boston. Manufactured in The Netherlands. A Modular Distributed-Arithmetic Implementation of the Inner Product and its Application to Digital Filters A.S. DE LA VEGA, RS.R. DINIZ AND A.C. MESQUITA Programa de Engenharia El~trica, COPPEIEE/Federal University of Rio de Janeiro, Caixa Postal 68504, Rio de Janeiro, R.J. Brazil, 21945 A. ANTONIOU Department of Electrical and Comp,~ter Engineering, University of Victoria, P.O. Box 3055, Victoria, B.C. Canada, VSW 3P6 Received June 9, 1992; Revised August 9, 1993 Abstract. A modular implementation of the inner product is proposed. The implementation is based on distributed arithmetic and incorporates three types of programmable quantization. It uses a single configurable cell and building blocks consisting of simple and regular structures that can be implemented efficiently in VLSI form. The design strategy developed can be used for the implementation of limit-cycle-free digital filters and in a number of other digital signal processing applications where a quantized sum of products is required. 1 Introduction Several recursive digital-filter structures that allow the elimination of zero-input and constant-input limit cy- cles have been proposed in recent years [1]-[5]. If these structures are implemented in terms of discrete adders and multipliers, the elimination of limit cycles can be achieved only if all multiplications in feed- back paths are carried out in double precision and full precision must be maintained up to the quantiza- tion points. In effect, the elimination of limit cycles is brought about at the expense of increased hardware complexity. Distributed arithmetic entails the use of aaders and memory instead of adders and multipliers, and has been used quite extensively for the implementation of inner products [6]-[9]. The use of distributed arithmetic for the design of digital signal processing building blocks that are amenable to VLSI implementation has been considered in [9]-[11]. In this paper, we propose a versatile architecture for the implementation of inner products based on dis- tributed arithmetic. The architecture incorporates three types of product quantization as well as a nonlinearity that can effect saturation arithmetic. It can be readily used in several applications such as the implementation of convolutions and correlations and recursive digital filters that are free of quantization and overflow limit cycles. The architecture is based on a single config- urable cell and is modular and regular; it is, therefore, highly suitable for VLSI implementation. In Section 2, a scheme by which various types of quantization and overflow nonlinearities can be incor- porated in the implementation of inner products is dis- cussed. Section 3 deals with the proposed architecture and Section 4 describes in detail the design of the in- dividual blocks. Details of the physical design and the mechanisms that lead to regularity and modularity are examined in Section 5. 2 General Representation of Inner Product The user of an inner-product module or chip may re- quire a number of features depending on the application at hand. If the module is to be used for the implemen- tation of digital filters, then it should be possible to achieve quantization by rounding or truncation and if elimination of zero- or constant-input limit cycles is required, magnitude truncation must be incorporated [12]-[13]. If the elimination of overflow is also re- quired, a nonlinearity should be incorporated that can effect saturation arithmetic [14]. An arbitrary digital filter that incorporates product quantization as well as mechanisms for the elimina- tion of quantization and overflow limit cycles can be