IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 48, NO. 6, JUNE 2013 1497 A Low-Power DCVSL-Like GIDL-Free Voltage Driver for Low-Cost RFID Nonvolatile Memory Hadar Dagan, Adam Teman, Student Member, IEEE, Evgeny Pikhay, Vladislav Dayan, Anatoli Mordakhay, Yakov Roizin, and Alexander Fish, Member, IEEE Abstract—The realization of a low-cost passive radio frequency identification (RFID) tag requires the ability to fabricate the system in a bulk CMOS process without any additional process steps. A recently presented single-poly C-Flash memory bit- cell provides an ultralow-power option for implementation of a nonvolatile memory array for use in an RFID system, using only core masks. This cell requires the application of a 10-V potential difference between the cell’s control lines for program and erase operations. Providing the required voltages, while using only standard devices results in several design challenges for the voltage drivers, such as the elimination of gate-induced drain leakage (GIDL) currents. In this paper, we present a pair of voltage driver architectures that utilize novel techniques to overcome these challenges. In addition, for the first time, we present an in-depth analysis of the dynamic behavior of standard level shifters. This analysis is applied to our proposed GIDL-free level shifters to provide a sizing methodology for optimization of the area, energy-per-operation, and delay of these circuits. The drivers were designed and fabricated in a TowerJazz 0.18- m bulk CMOS technology, providing the required functionality with a low static-power figure of 47–49 pW and 0.03–0.36 pJ energy-per-operation. Index Terms—C-flash, differential cascode voltage switch logic (DCVSL), grid-induced drain leakage (GIDL), level shifter, low cost, low power, nonvolatile memory (NVM), optimization, phase portrait, radio frequency identification (RFID), voltage driver. I. INTRODUCTION T HE key factors in widespread adoption of radio frequency identification (RFID) tags remain cost minimization and low-power operation [1]–[3]. The incorporation of read-write memories into RFID tags provides the opportunity to realize many advanced applications [2]; however, integration of an em- bedded nonvolatile memory (NVM) array into the integrated circuit (IC) is one of the major obstacles to cost reduction. In Manuscript received December 13, 2012; revised February 17, 2013; accepted March 08, 2013. Date of publication April 02, 2013; date of current version May 22, 2013. This paper was approved by Associate Editor Hideto Hidaka. This work was supported by the Alpha Consortium of the office of the Chief Scientist of Israel. H. Dagan and A. Teman are with the Low Power Circuits and Systems Lab (LPC&S), VLSI Systems Center, Ben-Gurion University of the Negev, Be’er Sheva 84105, Israel (e-mail: teman@ee.bgu.ac.il). E. Pikhay, V. Dayan, and Y. Roizin are with Tower Semiconductor Ltd., Migdal Haemek 23105, Israel. A. Mordakhay is with the Faculty of Engineering, Bar-Ilan University, Ramat Gan 52900, Israel. A. Fish is with the LPC&S of the VLSI Systems Center, Ben-Gurion Uni- versity of the Negev, Be’er Sheva 84105, Israel, and also with the Faculty of Engineering, Bar-Ilan University, Ramat Gan 52900, Israel. Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/JSSC.2013.2252524 general, NVM arrays are fabricated as stand-alone blocks in dedicated processes, requiring multiple nonstandard masks and process steps that substantially increase the manufacturing cost [4]. In addition, these memories usually require high voltages ( 10 V) to initiate the tunneling currents necessary for pro- gramming and erasing the memory. Delivering high voltages to the memory cells often requires special devices to eliminate high leakage currents, such as those caused by gate-induced drain leakage (GIDL) [5], as well as reliability problems. Man- ufacturing these devices further increases the chip fabrication costs. In order to manufacture a minimum-cost RFID tag, it is essential to integrate an embedded NVM array, fabricated ex- clusively with core CMOS masks [6]. Recently, TowerJazz presented an ultralow-power single-poly C-Flash bitcell that complies with the afore- mentioned requirements [7]. By applying opposite-polarity 5-V signals to isolated P-wells (IPWs), the 10-V potential difference necessary for Fowler–Nordheim (F-N) injection is achieved. In addition, this cell provides a fully digital readout through an integrated CMOS inverter, thus eliminating the need for power consuming analog readout circuitry. The C-Flash bitcell is fabricated using a standard 0.18- m CMOS process and is therefore a perfect candidate for integration in a low-cost, low-power, passive RFID tag. However, the cell operation requires a comprehensive control scheme, using several voltages (from 5 V to 5 V) that are applied upon a pair of shared buses. Standard analog voltage multiplexing implementations require large, power-hungry circuits, such as digital-to-analog converters (DACs), operational amplifiers, and switched capacitors [8] that are infeasible for integration in a row-wise manner in these low-power, low-cost devices. Therefore, the required voltage multiplexing is carried out by a pair of drivers that are solely comprised of standard devices. A. Contribution In this paper, we present the circuit implementation of novel low-power voltage drivers for delivering the required voltages for programming, erasing, and reading from a C-Flash-based NVM array. These drivers are implemented with standard de- vices, thus enabling low-cost integration of an NVM array into a passive RFID chip. In order to overcome the inherent chal- lenges in designing these drivers, a number of circuit techniques are proposed, and a novel sizing methodology was developed. This methodology is based on an in-depth, dynamic analysis of standard level shifters. This analysis is presented here for the first time and is shown to be applicable to other level-shifter topologies, such as the GIDL-free drivers that we propose here. Finally, the drivers were fabricated and tested, showing full 0018-9200/$31.00 © 2013 IEEE