1 Enhancing VHDL Learning through a Light-weight Integrated Environment for Development and Automated Checking Akash Kumar, Rajesh C. Panicker and Ashraf Kassim Department of Electrical & Computer Engineering, National University of Singapore, Singapore Corresponding author email: akash@nus.edu.sg Abstract—The development environments for Hardware De- scription Languages (HDLs) are essentially meant and designed for highly trained professionals/ engineers and as such are not suitable for use as an introductory tool for students learning HDLs. With students adopting a variety of operating systems, there is a need for a light-weight and cross-platform environment. Further, such a development environment for students should be able to provide some feedback about the functional correctness of their program. In this paper, we describe an open-source environment for developing and simulating VHDL programs on the client side, and a server side application for automated checking of submissions. The client has been developed for three desktop operating systems – Windows, Linux and MacOSX. The server application runs on Linux. The client allows students to develop and simulate VHDL programs. They can also submit programs to a remote server for automated verification. The environment – client and server, has been used for two semesters at the National University of Singapore to provide an enhanced learning experience to the students in a first year course on digital fundamentals. Index Terms—Integrated development environment, VHDL, Simulation, Automated checking. I. I NTRODUCTION Very high speed integrated circuit hardware description language (VHDL) is one of the two most popular hardware description languages, the other being Verilog. VHDL is widely used in academia and industry. It was developed by US department of defense and standardized by the IEEE (standards 1076-1987, 1076-1993, 1076-2008). It is a strictly typed, formal language syntactically similar to ADA. VHDL is widely taught as a part of the first or second course in digital design in undergraduate curricula of electrical / computer engineering. Hence, teaching community has been developing several tools and techniques for enhancing the students’ learning experience of VHDL [1], [2]. VHDL is also widely taught as a part of more advanced courses such as computer architecture [3], [4], and increasingly, as an alternate language for describing systems in other electrical / computer engineering courses [5]. Today’s electronic systems, ranging from digital audio sys- tems to complex computers, are substantially realized using digital logic. At National University of Singapore’s Depart- ment of Electrical and Computer Engineering, EE2020 Digital Fundamentals is a first course that introduces fundamental digital logic, digital circuits, and programmable devices to the students [6]. This course provides students with an un- derstanding of the building blocks of modern digital systems and methods for designing, simulating and realizing such systems. The emphasis of this module is on understanding the fundamentals of digital design across different levels of abstraction using hardware description languages and lab exercises. In fundamental courses, students are taught how to describe and simulate simple circuits using VHDL. However, most courses use bulky integrated development environments (IDEs) such as Xilinx Webpack or Altera Quartus as a tool for editing and simulating designs. For example, the most basic version of Xilinx ISE, the Webpack has a download size of more than 6GB and an installed size (depending on the selected features) close to 12GB. Moreover, it can be installed only on Windows and Linux platforms; thus it is not truly a multi-platform software. The increasing MacOSX user base is unable to use it without a virtual machine running a supported operating sys- tem (OS). While it is very feature rich and supports synthesis etc., such additional functionalities are probably unnecessary at the entry level. The large feature set may in fact, increase the learning curve for students in using the software. The software is typically required only for 6-8 weeks; only students who take advanced modules requiring VHDL need this software in the future. Hence, we have developed an IDE utilizing only open-source tools – jEdit, GHDL and GTKWave. The IDE is light-weight and has an installer of size less than 20MB. It is truly multi-platform and runs on MacOSX too. Further, since it is based on flexible editor jEdit, its functionalities can be easily enhanced through Java-based plugins. For efficient learning of programming, it is very important for students to receive immediate feedback about the cor- rectness of the program. While a (good) compiler is able to identify most syntax errors, extensive simulation is needed to ensure that the program works correctly for all scenarios. Sometimes, even though students think that they have the correct answer for all scenarios, the timing (which is very important in hardware design) may be incorrect. Manual checking of code and resulting simulation waveforms is not