37 Pseudo-3D Physical Design Flow for Monolithic 3D ICs: Comparisons and Enhancements HEECHUN PARK, Seoul National University, South Korea BON WOONG KU, Synopsys Inc., United States KYUNGWOOK CHANG, Sungkyunkwan University, South Korea DA EUN SHIM and SUNG KYU LIM, Georgia Institute of Technology, United States Studies have shown that monolithic 3D (M3D) ICs outperform the existing through-silicon-via (TSV) -based 3D ICs in terms of power, performance, and area (PPA) metrics, primarily due to the orders of magnitude denser vertical interconnections ofered by the nano-scale monolithic inter-tier vias. In order to facilitate faster industry adoption of the M3D technologies, physical design tools and methodologies are es- sential. Recent academic eforts in developing an EDA algorithm for 3D ICs, mainly targeting placement using TSVs, are inadequate to provide commercial-quality GDS layouts. Lately, pseudo-3D approaches have been devised, which utilize commercial 2D IC EDA engines with tricks that help them operate as an ef- cient 3D IC CAD tool. In this article, we provide thorough discussions and fair comparisons (both qualitative and quantitative) of the state-of-the-art pseudo-3D design fows, with analysis of limitations in each design fow and solutions to improve their PPA metrics. Moreover, we suggest a hybrid pseudo-3D design fow that achieves both benefts. Our enhancements and the inter-mixed design fow, provide up to an additional 26% wirelength, 10% power consumption, and 23% of power-delay-product improvements. CCS Concepts: • Hardware → 3D integrated circuits; Physical design (EDA); Software tools for EDA; Additional Key Words and Phrases: Monolithic 3D IC, pseudo-3D approach, computer-aided design, 3D place- ment, timing closure ACM Reference format: Heechun Park, Bon Woong Ku, Kyungwook Chang, Da Eun Shim, and Sung Kyu Lim. 2021. Pseudo-3D Phys- ical Design Flow for Monolithic 3D ICs: Comparisons and Enhancements. ACM Trans. Des. Autom. Electron. Syst. 26, 5, Article 37 (May 2021), 25 pages. https://doi.org/10.1145/3453480 1 INTRODUCTION Monolithic 3D (M3D) IC [4, 27] is introduced to maximize the benefts of 3D IC technologies with its monolithic inter-tier vias (MIVs) for the cross-tier connections. MIV overcomes the This work was supported by the BK21 FOUR program of the Education and Research Program for Future ICT Pioneers, Seoul National University in 2021. Authors’ addresses: H. Park, Seoul National University, 1 Gwanak-ro, Gwanak-gu, Seoul 08826, South Korea; email: phcssl0112@gmail.com; B. W. Ku, Synopsys Inc., 690 E Middlefeld Rd, Mountain View, CA 94043, United States; email: bon.ku@synopsys.com; K. Chang, Sungkyunkwan University, 2066, Seobu-ro, Jangan-gu, Suwon-si, Gyeonggi-do 16419, South Korea; email: k.chang@skku.edu; D. E. Shim and S. K. Lim, Georgia Institute of Technology, 266 Ferst Drive, Atlanta, GA 30332, United States; emails: daeun@gatech.edu, limsk@ece.gatech.edu. Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for proft or commercial advantage and that copies bear this notice and the full citation on the frst page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specifc permission and/or a fee. Request permissions from permissions@acm.org. © 2021 Association for Computing Machinery. 1084-4309/2021/05-ART37 $15.00 https://doi.org/10.1145/3453480 ACM Transactions on Design Automation of Electronic Systems, Vol. 26, No. 5, Article 37. Pub. date: May 2021.