914 JOURNAL OF MICROELECTROMECHANICAL SYSTEMS, VOL. 14, NO. 5, OCTOBER 2005 Anodic Oxidation During MEMS Processing of Silicon and Polysilicon: Native Oxides Can Be Thicker Than You Think Harold Kahn, Chris Deeb, Ioannis Chasiotis, and Arthur H. Heuer Abstract—The thickness and surface roughness of the native oxide on undoped and P-doped single crystal silicon and poly- crystalline silicon (polysilicon) were measured after exposure to aqueous hydrofluoric acid (HF) in the presence of localized metal- lization of sputtered Au or Pd. Both P-doping and the presence of metallization led to an increase in the thickness of the native sur- face oxide and an increased surface roughness after HF exposure. An external positive (negative) potential during HF immersion increased (decreased) the rate of what is clearly electrochemical i.e., anodic corrosion. The presence of the sputtered metallization promoted anodic corrosion, particularly in HF and particularly for P-doped silicon. Porous silicon can be formed under these conditions, due to dissolution of the anodically produced surface oxide. Subsequent oxidation of the porous silicon can lead to thick surface oxide layers. [1354] Index Terms—Anodic oxidation, electrochemical, galvanic, porous Si. I. INTRODUCTION T HE MUMPs (multiuser MEMS processes) program, of- fered for the past decade by MEMSCAP (previously JDS Uniphase, Cronos, and MCNC), is among the few commer- cially available polysilicon surface-micromachining services that accept microdevice designs from customers and fabricates the structures at a dedicated foundry using standard microma- chining techniques. The MUMPs process involves P-doped polysilicon, formed by depositing undoped low-pressure chem- ical vapor deposited (LPCVD) polysilicon between two layers of LPCVD phosphosilicate glass (PSG), and annealing at high temperatures to allow the phosphorus to diffuse into the polysil- icon. The MUMPs process also uses a Cr/Au metallization layer for making electrical contacts (Cr is an adhesion layer between the Au and polysilicon). As is common for polysilicon surface micromachining processes, the final process step is to dissolve the release oxide in 49% HF. Several unusual phenomena have been recently reported in conjunction with the fabrication and properties of MUMPs- processed devices: i) Chan et al. [1] showed that for otherwise Manuscript received June 14, 2004. Subject Editor N. de Rooij. H. Kahn and A. H. Heuer are with the Department of Materials Science and Engineering, Case Western Reserve University, Cleveland, OH 44106 (e-mail: kahn@case.edu). C. Deeb was with the Department of Materials Science and Engineering, Case Western Reserve University, Cleveland,OH 44106 USA. He is now with Intel Corporation, Santa Clara, CA 95054 USA. I. Chasiotis is with the Department of Aerospace Engineering, University of Illinois, Urbana-Champaign, IL 61801 USA. Digital Object Identifier 10.1109/JMEMS.2005.851802 identical polysilicon features, those that were electrically con- nected to Au were etched in the HF release step such that those features became slightly thinner and rougher than the features that were not in electrical contact with Au; ii) Muhlstein et al. [2] reported that their polysilicon devices exhibited extremely thick surface or “native” oxides after HF release; and iii) Chasiotis and Knauss [3], [4] found that increasing the exposure time to HF during release led to increased polysil- icon surface roughness—the depth of the deepest trenches increased from 30 nm after 9 min exposure to almost 50 nm after 13 min exposure. They also found lower tensile strengths with increased HF exposure—1.43 GPa after 7.5 min exposure compared to 0.25 GPa after 20 min exposure. They explained their findings on the basis of electrochemical etching assisted by Au metallization and accentuated by P-doping [4]. Moreover, recent experiments reported by Chasiotis [5] showed a 30% increase in tensile strength of MUMPs polysilicon specimens that did not include Au metallization. Atomic force microscopy investigations of the same surface locations before and after etching showed no discernible changes in the surface mor- phology after exposure to 49% HF for 9 min. Walker et al. [6] some time ago described a related phenomenon for membranes fabricated at Bell Laboratories—a decrease in burst strength for polysilicon membranes exposed to HF for 2 h, relative to: i) membranes exposed to deionized water (DI); ii) membranes exposed to a commercial buffered oxide etchant (BOE); or iii) unexposed membranes. In general, these phenomena have not been recognized in polysilicon devices fabricated in other foundries, it being almost universally assumed that the native oxide is thin and independent of the presence of metal conductors. We have now investigated these phenomena and find that anodic oxidation can occur during HF exposure of Si-based devices. II. MICROSTRUCTURAL STUDIES OF MUMPS AND CASE POLYSILICON DEVICES Fig. 1(a) shows a scanning electron micrograph (SEM) of a MUMPs polysilicon device (from MUMPs run 21) after a 13-min HF release step, showing the top surface and plasma- etched sidewall. The top surface morphology is relatively rough, with grooves that penetrate relatively deeply into the bulk of the device. The grooves apparently delineate the inter- sections of grain boundaries with the specimen surface, and are likely caused by preferential removal of material at the grain boundaries during release. Fig. 1(b) shows a similar SEM 1057-7157/$20.00 © 2005 IEEE