1712 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 53, NO. 7, JULY 2006 Thermal Behavior of a Superjunction MOSFET in a High-Current Conduction Jaume Roig, Evgueniy Stefanov, Member, IEEE, and Frédéric Morancho Abstract—In this paper, a detailed study of the superjunction MOSFET (SJ-MOSFET) thermal behavior on high-current con- duction is presented. First, the heat-generation (HG) process and its dependence on device geometry and biasing conditions are elucidated from numerical-simulation tools. Later, the resultant temperature distribution is evaluated by simulation, thus, acquir- ing a physical understanding of its impact on the electrical char- acteristics and failure mechanisms, particularly at short-circuit operation. The obtained results show relevant differences with respect to the thermal behavior of conventional power MOSFETs. As a matter of fact, the maximum HG in SJ-MOSFET is found at a certain distance from the surface, which principally depends on the drift length. This fact has important implications on the device reliability prediction and a compact electrothermal modeling. Index Terms—Power MOSFET, reliability, short circuit, super- junction (SJ), thermal modeling. I. INTRODUCTION T HE POWER MOSFET is a very important device in many power-electronics applications for its well-known intrin- sic advantages: high-input impedance, short switching time, and thermal stability. In power-electronics circuits, the power MOSFET is mainly used as a switch, in which the specific ON resistance (R ON ) and the breakdown voltage (BV dss ) are the two most important parameters to be considered. Actually, to reduce the conduction losses in a MOSFET, its specific ON resistance must be reduced. The vertical double diffused MOSFET structure (VDMOS) is widely used as a power MOSFET. This structure [Fig. 1(a)] is based upon the double diffusion of the P-body and N + source regions using the edge of the polysilicon as a masking boundary. The voltage-handling capability of this structure is given by the breakdown voltage of the “P-body/ N - -epilayer” junction that is strongly dependent on the thickness and the doping of the lower doped region (i.e., the N - -epilayer region in the case of an N-channel VDMOS transistors) [1]. Transistor’s specific ON resistance has been improved, owing to the advances in the process technology towards a high- packing density. Nevertheless, improvements in specific ON resistance have been limited by a material and breakdown voltage, which required a relatively thick and lowly doped epitaxial layer. In the last decade, new power-MOSFET con- Manuscript received March 8, 2006. The review of this paper was arranged by Editor M. A. Shibib. J. Roig and F. Morancho are with the Laboratoire d’Analyse et d’Architecture des Systèmes/Centre National de la Recherche Scientifique (LAAS/CNRS), 31077 Toulouse CEDEX 4, France (e-mail: jroiggui@laas.fr). E. Stefanov is with Freescale Semiconductors France SAS, 31023 Toulouse CEDEX 1, France. Digital Object Identifier 10.1109/TED.2006.876277 Fig. 1. Schematic cross section of (a) VDMOS and (b) SJ-MOSFET basic cell structures. figurations, which are based on the compensation charge (CC) principle, have been proposed to reduce a specific ON resistance while keeping a high-breakdown voltage. As the CC principle essentially modifies the drift-region design, this technique is more efficient in high-voltage MOSFET structures whose drift region is highly resistive. Among the CC MOSFETs, the super- junction (SJ) [2], [3] and floating-island [4], [5] concepts have successfully demonstrated the improvement of the R ON versus the BV dss tradeoff, thus being implemented in commercial devices as the CoolMOS and the MDmesh. The SJ-MOSFET structure [Fig. 1(b)] laterally alternates N and P pillars. As a consequence, a lateral depletion is produced during the block- ing state, which compensates the vertical depletion charge. A thermal-management study at a device level has been scarcely done in the CC MOSFET transistors. A CoolMOS equivalent circuit for the transient thermal impedance is re- ported in [6] for compact-modeling purposes. The numerous thermal capacitances and resistances of such equivalent circuit are adjusted experimentally. This type of device modeling is addressed to existent devices and supports a simplified and more efficient circuit design. However, it does not provide a useful information at the device design level. Other papers focus on thermally related subjects, as the single-event burnout [7], [8] and the energetic capability at avalanche and short- circuit conditions [6], [9]. Indeed, the thermal runaway destroys the device for avalanche or short-circuit energies beyond a critical value. A recent study [10] reveals a similar current- and energy-density capabilities between 600-V CoolMOS and IGBT working at short-circuit conditions. In spite of this, the mentioned papers present a lack of physical insight concerning the electrothermal behavior of the SJ-MOSFET. Opposite to the largely studied VDMOS [11]–[14] and IGBT [15], [16] devices, 0018-9383/$20.00 © 2006 IEEE