This is the author's version of an article that has been published in this journal. Changes were made to this version by the publisher prior to publication. The final version of record is available at https://doi.org/10.1109/TVLSI.2018.2881249 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS 1 ±0.25-V Class-AB CMOS Capacitance Multiplier and Precision Rectifiers Shirin Pourashraf , Member, IEEE, Jaime Ramírez-Angulo , Life Fellow, IEEE , José María Hinojo Montero, Member, IEEE, Ramón González-Carvajal, Senior Member, IEEE , and Antonio J. Lopez-Martin , Senior Member, IEEE Abstract—Reduction of minimum supply requirements is a crucial aspect to decrease the power consumption in VLSI sys- tems. A high-performance capacitance multiplier able to operate with supplies as low as ±0.25 V is presented. It is based on adaptively biased class-AB current mirrors which provide high current efficiency. Measurement results of a factor 11 capacitance multiplier fabricated in 180-nm CMOS technology verify theo- retical claims. Moreover, low-voltage precision rectifiers based on the same class-AB current mirrors are designed and fabricated in the same CMOS process. They generate output currents over 100 times larger than the quiescent current. Both proposed circuits have 300-nW static power dissipation when operating with ±0.25-V supplies. Index Terms— Capacitance multiplier, class-AB current mirror, low supply voltage, precision rectifiers. I. I NTRODUCTION I NCREASING demand for low-voltage/low-power VLSI systems aimed to portable and biomedical devices mandates a reduction of their minimum supply voltage requirements [V supplymin = (V DD - V SS ) min ] and low quiescent current. Furthermore, a low-voltage operation is a requirement in modern CMOS technologies that operate with subvolt supplies (V DD < 1 V). Current-mode (CM) systems where input–output and intermediate variables are defined as currents [1] are well suited to very low supply voltages. They often require a low- voltage linear operational transconductance amplifier (OTA) for voltage-to-current conversion as an interface between the external input voltage signals and the internal input current signals required by CM systems. Several approaches to imple- ment low-voltage OTAs have been reported [2], [3]. Capacitance multiplication is used frequently to reduce silicon area requirements in VLSI systems [4]–[15]. In capacitance multipliers (Cap-Mlts), an equivalent capacitance Manuscript received July 27, 2018; revised October 7, 2018; accepted November 9, 2018. This work was supported by the Spanish National Research Agency under Grant TEC2016-80396-C2 (AEI/FEDER). (Corresponding author: Shirin Pourashraf.) S. Pourashraf and J. Ramírez-Angulo are with the VLSI Laboratory, Klipsch School of Electrical and Computer Engineering, New Mexico State University, Las Cruces, NM 88003 USA (e-mail: shirin_p@nmsu.edu; jairamir@nmsu.edu). J. M. H. Montero and R. González-Carvajal are with the Departamento de Ingeniería Electrónica, Escuela Superior de Ingenieros, Universidad de Sevilla, E-41092 Seville, Spain (e-mail: jhinojo@us.es; carvajal@gte.esi.us.es). A. J. Lopez-Martin is with the Institute of Smart Cities, Public University of Navarra, 31006 Pamplona, Spain (e-mail: antonio.lopez@unavarra.es). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TVLSI.2018.2881249 Fig. 1. Capacitance multiplier approaches [5]. (a) Current-mode. (b) Voltage- mode. C eq = kC is achieved using active devices. Parameter k is the capacitance multiplication factor and C is the base (physical) capacitance. There are two basic approaches for capacitance multiplication: CM [Fig. 1(a)] [4] and voltage mode (VM) [Fig. 1(b)] [5]. In CM capacitance multiplication [Fig. 1(a)], the capacitor current I c is replicated by a factor m current mirror whose output is connected to the signal terminal driving the capacitor C . This results in a source current I s = (1 +m) I c corresponding to an equivalent capacitance C eq C eq = (1 + m)C = kC. (1) Fig. 1(b) shows a VM capacitance multiplier based on the Miller effect. It uses an active component (inverting amplifier with gain | A|). The resulting equivalent capacitance of Fig. 1(b) is C eq = (1 +| A|)C = kC. (2) Note that the capacitance multiplication factors for CM and VM systems are k = 1 + m and k = 1 +| A|, respectively. CM capacitance multiplier based on current mirrors is preferred over VM capacitance multiplier as they are simpler and can operate with very low supply voltages thanks to the very low swing at their internal nodes. For this reason, their minimum supply voltage corresponds to the supply requirement of the mirror and the current source driving them. They are also very fast since they are feedforward circuits with only low- impedance nodes (high-frequency poles) in the signal path. On the other hand, VM circuits have higher supply require- ments since they require at least the voltage signal swing plus the headroom of input differential pair if an op-amp is used to implement the inverting amplifier with gain | A|. In addition, in the Miller-based VM capacitance multiplication, since a 1063-8210 © 2018 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information. © 2018 IEEE. Personal use of this material is permitted. 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