Integration, the VLSI Journal xxx (xxxx) xxx Contents lists available at ScienceDirect Integration, the VLSI Journal journal homepage: www.elsevier.com/locate/vlsi A comprehensive analysis on the resilience of adiabatic logic families against transient faults Reza Narimani a , Bardia Safaei b, c , Alireza Ejlali c , ∗ a Sharif University of Technology, Kish Island International Campus, Department of Engineering and Science, Iran b Karlsruhe Institute of Technology (KIT), Computer Science Faculty, Karlsruhe, Germany c Sharif University of Technology, Department of Computer Engineering, Tehran, Iran ARTICLE INFO Keywords: Adiabatic circuits Energy consumption Fault injection Reliability ABSTRACT With the emergence of various battery operated technologies in different computing domains and the challenge of heating in such technologies, the issue of energy dissipation has become more critical than ever before. In such systems, energy constraints in one hand, and heat generation, on the other hand, necessitates the employment of energy efficient technologies in the fabrication of digital circuits. One possible solution for mitigating the energy dissipation in digital circuits is the use of adiabatic families in the process of designing computing devices. Adiabatic circuits are designed mainly based on the principles of thermodynamics and provide a paradigm shift in the design of digital systems. Nevertheless, their impact on the reliability of digital circuits due to susceptibility to soft errors has not been explored comprehensively. In this paper, we first try to survey some existing adiabatic logic families. Then we attempt to evaluate their reliability by validating their functionality under the effect of soft errors. Our evaluations which were conducted on a set of SPICE simulations have shown that amongst SCRL, 2LAL, RERL, PFAL, 2N2N2P and ECRL families the ECRL family is able to tolerate more than 90% of the injected transient faults and the applications with a high demand of reliability can use this family of adiabatic circuits. Furthermore, we will propose some suggestions for establishing reliable computations through adiabatic circuits. 1. Introduction Motivated by the emerging battery operated hand-held devices, min- imizing energy consumption has become a significant concern in the semiconductor industry. On the other hand, heat generation in large- scale computing systems has become a severe challenge. In recent years, some techniques were introduced to reduce the energy consumption and heat generation in computing devices. These methods were pro- posed with the aim of reducing energy consumption due to both the dynamic activities and leakage issues. Generally, in previous decades, the dynamic energy consumption was the dominant factor in the bat- tery depletion [1]; but in recent years, due to the enormous amount of progress in the scale of technology, the leakage energy has also become very critical [1]. The previous efforts on mitigating the dynamic energy consump- tion in digital circuits are extensive. Meanwhile, the charge recovery is a promising approach which tries to reduce the power consump- tion significantly [2]. In several circuit-level implementations of the ∗ Corresponding author. E-mail addresses: rnarimani@ce.sharif.edu (R. Narimani), bardia.safaei@kit.edu (B. Safaei), bsafaei@ce.sharif.edu (B. Safaei), ejlali@sharif.edu (A. Ejlali). charge recovery, reversible patterns (which are compliant with Lan- dauer’s principle [3]) have shown less energy consumption [4–10]. According to the Landauer’s principle, losing any bit would lead into dissipation of energy with a size of kTln(2), where k is the Boltzmann’s constant while the T is indicating the temperature [3,11,12]. Therefore, to reduce energy consumption, information should not be erased. Any logic operations, which does not require erasing information is called a reversible logic operation [3]. Adiabatic circuits are based on reversible logic [12,13]. In adiabatic circuits, two significant changes have reduced dynamic energy consumption. The first reason is the use of constant current for charging the output capacitors. This constant current in such cir- cuits is generated through a ramp voltage source. The ramp voltage can minimize the potential difference between drain and source termi- nals; Hence, it could reduce the energy consumption during switching phases. The second is the power supply features that are capable of recovering energy stored in the output capacitors and preventing their dissipation. Although adiabatic circuits reduce the dynamic energy con- sumption, some methods have been also developed to reduce leakage https://doi.org/10.1016/j.vlsi.2020.01.004 Received 14 July 2019; Received in revised form 18 November 2019; Accepted 22 January 2020 Available online XXX 0167-9260/© 2020 Published by Elsevier B.V. Please cite this article as: R. Narimani, et al., A comprehensive analysis on the resilience of adiabatic logic families against transient faults, Integration, the VLSI Journal, https://doi.org/10.1016/j.vlsi.2020.01.004