2009 IEEE International Advance Computing Conference (IACC 2009) Patiala, India, 6-7 March 2009 Hardware Efficient Algorithm for Complex Arithmetic Kavita Kharel, Nilay Khare2, Supriya Aggarwal3 'Asst. Prof., Dept. ofElectronics & Communication Engineering, MA.N.I. T, Bhopal. Address: Asst. Prof., Dept. ofElectronics & Communication Engineering, M.A.N.I. T, Bhopal, India - 460051 Email: kavita kharel dahooco.in Ph: 91-982 7061110 2 Head State Project Facilitation Unit, Madhya Pradesh Technical Education. Address: Head, State Project Facilitation Unit (SPFU), Tagore Hostel II, Shyamla Hills, Bhopal, India - 462002 Email: nilay khare hoo.co.in Ph: 91-755-2420777 3M. Tech. Student, MA.N.I. T, Bhopal. Address: B-50, Alkapuri, Bhopal, India - 462024 Email: s=ps.a arwaL dmail, com Ph: 91-9993958335 Abstract - There has been high demand for low This version is relatively less complex as it eliminates power and area efficient implementation of complex the scaling factor calculations. Also the number of arithmetic operations in many Digital Signal micro-rotations is significantly reduced by varying the Processing applications. The CORDIC (COordinate sign sequence. Rotation DIgital Computer) Algorithm is a unique This paper is structured as follows: Section II gives technique for performing various complex an overview of CORDIC algorithms including the new arithmetic functions using shift-add iterations. This algorithm. Design implementation and performance paper proposes an enhanced version of new improvement are detailed in Section III; the VLSI CORDIC algorithm (obtained from conventional hardware implementation and results in Section IV; CORDIC by using Taylor series expansion of sine performance comparison in Section V; conclusion and cosine functions) discussed in [1]. The recursive drawn in Section VI. References are listed in Section architecture implementation of the revised new VII. CORDIC algorithm improves the throughput by 50% as compared to the previous design. Revised 2. CORDIC Algorithm algorithm, VLSI implementation of the design and The CORDIC algorithm is an arithmetic algorithm its performance comparison with [1] are discussed. used in either rotation or vectoring mode. The computation of different functions is based on rotations Iexursiv TrmsitecCOr, FPGA,x92 iE S by a fixed rotation angle but with variable rotation Recursive Architcture*i direction. The rotation can be in three different systems: hyperbolic, circular or linear. In this paper the 1. Introduction focus is on circular rotation. The implementation of the In 1959 Volder [2] was first to introduce CORDIC new CORDIC algorithm is also based on circular Algorithm for solving trigonometric relationships in rotation system. plane coordinate rotation and rectangular to polar There are various implementations for CORDIC coordinate conversions. Later on in the year 1971 the Algorithm like Angle Recoding (AR) Scheme [4], algorithm was generalized by Walther [3] to perform Modified Vector Rotational (MVR) CORDIC [5], various mathematical functions like multiplication, Extended Elementary Angle Set CORDIC etc; each of division, sine, cosine, tangent, arctangent etc. The them having their specific areas of implementation; algorithm consists of only look up tables (LUTs), like AR technique is used in digital filters where addition/subtraction and shift operations. Simplicity of rotational angles are known in advance. MVR scheme operations as well as design makes it suitable for is an extension of AR scheme. But none of the various VLSI implementations. technique focuses on minimization of number of CORDIC is used in digital signal processing and iterations. Increased number of iterations in turn communication systems where large amount of increases the power consumption. The new CORDIC rotations are involved like - Fourier and related Algorithm derived by using Taylor series expansion Transforms (FFT/DFT, Discrete Sine/Cosine minimizes the number of iterations for the same output Transforms), Householder Transformations, Singular precision as conventional CORDIC and hence the Value Decomposition (SVD) and other Matrix power consumption. Operations; Filtering and Array Processing. This paper discussed the revised version of new CORDIC algorithm derived in [1] which is a simplified version of conventional CORDIC algorithm. The revised version forms the basis of the recursive design. 978- 1-4244-2928-8/09/$25.00 © 2009 IEEE 209