402 IEEE TRANSACTIONS ON NANOTECHNOLOGY, VOL. 10, NO. 3, MAY2011 Study of Gate Oxide/Channel Interface Properties of SON MOSFETs by Random Telegraph Signal and Low Frequency Noise M’hamed Trabelsi, Liviu Militaru, Nabil Sghaier, Andrea Savio, Stephane Monfray, and Abdelkader Souifi Abstract—The aim of this paper is the investigation of the gate stack properties of submicron MOSFETs integrated in silicon on nothing technology and the identification of traps responsible for the current fluctuations by random telegraph signal (RTS) tech- nique and low frequency technique. We show that the analysis of devices having random discrete fluctuations in the drain current, the analysis of the RTS noise parameters (amplitude, high and low state durations, activation energy, capture cross section) as a function of bias voltage and temperature, allows us to characterize the traps located in the interface (HfO 2 -SiO 2 )/Si. The conventional technique consists of statistical treatment of the RTS time-domain data. The study of RTS noise in submicron SON MOS transistors offers the opportunity of studying the trapping/detrapping behav- ior of a single interface trap. Furthermore, it has convincingly been shown that this discrete switching of the drain current between a high and a low state is the basic feature responsible for l/f γ flicker noise in MOSFETs transistors. Index Terms—Individual trap, low frequency noise, random tele- graph signal (RTS) noise, silicon on nothing (SON) technology, submicron SON MOS, trapping/detrapping. I. INTRODUCTION R ANDOM telegraph signals (RTS) have been studied in a number of different semiconductor devices, most of all in the drain current of MOSFETs transistors [1] and in the gate current of MOS diodes biased in accumulation [2]. The RTS phenomenon is commonly related to a carrier trapping and detrapping process, where the capture and emission kinet- ics are explained within standard Shockley–Read–Hall (SRH) theory and the principle of detailed balance. The occupation of the trap is followed by a perturbation of the conductance. This conductance modulation manifests itself in two distinct levels of the drain current measured in function of the time. Experimental observations in the drain current of submicron silicon on nothing (SON) MOS transistor showed decreasing Manuscript received June 25, 2009; revised December 16, 2009; accepted January 16, 2010. Date of publication February 18, 2010; date of current ver- sion May 11, 2011. The review of this paper was arranged by Associate Editor S. D. Cotofana. M. Trabelsi and N. Sghaier are with the Institut Pr´ eparatoire aux Etudes d’Ing´ enieur de Nabeul, Nabeul 8000, Tunisia (e-mail: trabelsimhamed@ yahoo.fr; nabil.sghaier@ipein.rnu.tn). L. Militaru, A. Savio, and A. Souifi are with the Institut national des sciences appliqu´ ees de Lyon (INSA Lyon), 69621 Villeurbanne, France (e-mail: liviu.militaru@insa-lyon.fr; andrea.savio@insa-lyon.fr; abdelkader. souifi@insa-lyon.fr). S. Monfray is with the ST Microelectronics, Grenoble 38926, France (e-mail: stephane.monfray@st.com). Digital Object Identifier 10.1109/TNANO.2010.2043112 mean capture time <t c > (up state of the current) as a function of gate voltage and practically constant or slightly increasing mean emission time <t e > (down state of the current). The stan- dard SRH theory does not adequately reproduce this behavior, namely a much steeper decrease of the capture time with ap- plied gate voltage than the corresponding increase in carrier concentration in the channel is observed [3]. Kirton and Uren interpreted these findings by a voltage dependent capture cross section, but only proposed different hypotheses for its expla- nation, one of them being the screening of the trapped charge according to the operating condition of the device [1]. Usually, for semiconductor devices the 1/f noise and the RTS fluctua- tions are associated with conductivity fluctuations [4]. In the case of MOSFETs, these variations may be associated with car- rier number fluctuations (Mc Whorter model) [5], with mobility fluctuations (Hooge model) [6], or with carrier number fluctu- ations inducing mobility fluctuations [7]. The trap at or near the (HfO 2 -SiO 2 )/Si interface responsible for these RTS can be created by the fabrication process. The results of a systematic study of 1/f noise and RTS, characterized by discrete drain cur- rent fluctuation caused by individual trap in submicron SON MOS transistor are presented and analyzed. II. EXPERIMENTAL DETAILS The analyzed transistors have been integrated using the SON technology as described in [8]. In the SON process, the silicon film and the buried insulator are defined by epitaxy on a bulk substrate, allowing extremely thin films and at the same time offering the excellent thickness control of the epitaxy process. The integration of such thin-film devices requires HK and metal gate for the threshold voltage adjustment, which may lead to the presence of traps responsible for the RTS fluctuations. These drain current fluctuations were analyzed from weak-to-strong inversion and have been measured using a transimpedance am- plifier (Keithley 428) and were recorded using a 300 MHz digital oscilloscope controlled by a PC computer via a GPIB interface. These types of devices for this study by RTS technique have a small area T1 (W = 0.35 μm, L = 0.25 μm), tunnel oxide thick- ness t ox = 4 nm (t ox (SiO 2 ) = 1 nm, t ox (HfO 2 ) = 3 nm) and silicon film thickness T Si = 11 nm. The low-frequency noise power spectral density (PSD) has been measured using a spec- trum analyzer, on devices with large areas T2(L = 10 μm and W = 10 μm). 1536-125X/$26.00 © 2010 IEEE