IEEE TRANSACTIONS ON ELECTRONDEVICES, VOL. 62, NO. 5, MAY 2015 1383 Large-Signal Reliability Analysis of SiGe HBT Cascode Driver Ampliﬁers Michael A. Oakley, Member, IEEE, Uppili S. Raghunathan, Student Member, IEEE, Brian R. Wier, Student Member, IEEE, Partha Sarathi Chakraborty, Member, IEEE, and John D. Cressler, Fellow, IEEE Abstract—This paper presents the results of an investigation of the steady-state safe operating conditions for large-signal silicon-germanium (SiGe) heterojunction bipolar transistor (HBT) circuits. By calculating capacitive currents within the intrinsic transistor, avalanche inducing currents through the transistor junctions are isolated and then compared with dc instability points established through simulation and measurement. In addition, calibrated technology computer-aided design simulations are used to provide further insight into the differences between RF and dc operation and stress conditions. The ability to swing the terminals of a SiGe HBT beyond the static I –V conditions coincident with catastrophic breakdown is explained. Furthermore, hot-carrier effects are also compared from multiple perspectives, with supporting data taken from fully realized X -band and C-band cascode driver ampliﬁers. This analysis provides microwave circuit designers with the framework necessary to better understand the full-voltage-swing potential of a given SiGe HBT technology and the resultant hot carrier damage under RF operation. Index Terms—Avalanche, ballast, base leakage, breakdown, cascode, heterojunction bipolar transistor (HBT), power ampliﬁer, reliability, RF stress, safe operating area (SOA), SiGe. I. I NTRODUCTION R F RELIABILITY analysis of large-signal bipolar circuits is an under-investigated topic in electronics design literature, perhaps due to the complexity presented by time-dependent thermal considerations necessary to correlate RF to direct current (dc) damage. Most explorations in the literature concerning silicon-germanium (SiGe) heterojunction bipolar transistors (HBTs) are limited to either dc safe oper- ating area (SOA) or qualitative RF comparisons. In [1], the concept of a revised load line was proposed as a mapping methodology for relating RF to dc SOA, wherein intrinsic transistor capacitive currents are subtracted from the device’s terminal currents to isolate the breakdown-inducing conditions across the bipolar junctions as a function of time. This paper expands that work, explores the application of that theory, and speciﬁes its limitations. Manuscript received January 13, 2015; revised February 19, 2015; accepted February 21, 2015. Date of publication March 10, 2015; date of current version April 20, 2015. This work was supported by the Raytheon Space and Airborne Systems and Raytheon Integrated Defense Systems. The review of this paper was arranged by Editor G. Niu. The authors are with the School of Electrical and Computer Engi- neering, Georgia Institute of Technology, Atlanta, GA 30332 USA (e-mail: maoakley@gatech.edu; uppili@gatech.edu; brianwier@gatech.edu; pchakraborty3@gatech.edu; cressler@ece.gatech.edu). Color versions of one or more of the ﬁgures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identiﬁer 10.1109/TED.2015.2407870 Fig. 1. Schematic of an emitter-ballasted cascode ampliﬁer. Damage accrues primarily in the upper device of a SiGe HBT cascode, increasing I B2 , with imperceptible RF impact on the overall ampliﬁer performance. Analysis of the revised load line perspective is best begun from a well-founded understanding of hot-carrier effects and avalanche-induced breakdown in SiGe HBTs. The following sections review these topics in the context of a cascode ampliﬁer (Fig. 1), a widely used topology in the large-signal SiGe application domain, in large part due to its increased voltage handling. Building upon this foundation, this paper steps toward quantifying the large voltage swing that is reliably achievable by a SiGe HBT cascode driver ampliﬁer. A. Hot-Carrier Effects High electric ﬁelds in the collector–base (CB) depletion region of a SiGe HBT caused by high CB voltage (V CB ) produce hot, or high energy, carriers capable of propagating to the emitter–base (EB) spacer. Due to the breaking of hydrogen bonds at the oxide interface by the hot carrier, traps are formed, leading to a voltage-dependent parasitic base leakage current, which increases with stress duration. Trap annealing simultaneously occurs at a rate dependent on temperature, and the operating conditions of the SiGe HBT determine the dominant mechanism. For a single SiGe HBT in a common-emitter conﬁguration, device lifetime can be calculated as the point where current 0018-9383 © 2015 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.