Limits to Metallic Conduction in Atomic-Scale Quasi-One-Dimensional Silicon Wires Bent Weber, 1,* Hoon Ryu, 2 Y.-H. Matthias Tan, 3 Gerhard Klimeck, 3 and Michelle Y. Simmons 1,† 1 Centre of Excellence for Quantum Computation and Communication Technology, School of Physics, University of New South Wales, Sydney, New South Wales 2052, Australia 2 National Institute of Supercomputing and Networking, KISTI, Daejeon 305-806, South Korea 3 Network for Computational Nanotechnology, Birck Nanotechnology Center, Purdue University, West Lafayette, Indiana 47907, USA (Received 5 May 2014; revised manuscript received 18 September 2014; published 10 December 2014) The recent observation of ultralow resistivity in highly doped, atomic-scale silicon wires has sparked interest in what limits conduction in these quasi-1D systems. Here we present electron transport measurements of gated Si∶P wires of widths 4.6 and 1.5 nm. At 4.6 nm we find an electron mobility, μ el ≃ 60 cm 2 =V s, in excellent agreement with that of macroscopic Hall bars. Metallic conduction persists to millikelvin temperatures where we observe Gaussian conductance fluctuations of order δG ∼ e 2 =h. In thinner wires (1.5 nm), metallic conduction breaks down at G ≲ e 2 =h, where localization of carriers leads to Coulomb blockade. Metallic behavior is explained by the large carrier densities in Si∶P δ-doped systems, allowing the occupation of all six valleys of the silicon conduction band, enhancing the number of 1D channels and hence the localization length. DOI: 10.1103/PhysRevLett.113.246802 PACS numbers: 73.63.Nm, 71.23.An, 73.23.Hk, 85.35.-p Individual dopants in semiconductors are emerging as active components in device applications due to their electrical [1–3], spintronic [4,5], or optoelectronic [6] properties. Combined with the ability to encode quantum information [5] within their spin or charge degrees of freedom, individual dopants can be regarded as the funda- mental limit in semiconductor device scaling. However, the construction of complex devices [7–9] and scalable archi- tectures [10,11] requires low-resistive electrodes and inter- connects of comparable scale as the dopants themselves. Recently, we reported the fabrication of atomic-scale wires in silicon, using STM hydrogen lithography, phos- phorus δ doping, and low-temperature molecular beam epitaxy [1]. In contrast to other silicon nanowires [12] these highly doped systems were found to maintain a diameter- independent bulklike resistivity as low as ρ 3D ¼ð0.3  0.2Þ mΩ cm at T ¼ 4.2 K. These results implied Ohmic scaling down to diameters comparable to the donor Bohr radius (a B ∼ 2.5 nm), raising the question whether these wires could be regarded as metallic. Indeed, atomistic tight-binding (TB) calculations con- firm a metallic band structure with Fermi energies as much as E F ≃ 135 meV above the local conduction band edge [1,13]. These calculations, however, assume “ideal” wires with periodic repetitions of doped supercells and do not capture potential disorder in the wire arising from the disordered placement of donors. Understanding this dis- order is crucial since it can lead to spatial localization of electronic wave functions [14] and ultimately imposes a limit on the observation of metallic conduction in low- dimensional nanostructures. In strictly one-dimensional (1D) systems (those with a single quantum channel), disorder causes localization over a length scale as short as the carrier mean free path, l [15]. With l ≃ 5–10 nm Si∶P δ-doped systems [16], no appreci- able length scale would exist over which metallic con- duction and Ohm’ s law could be maintained [17]. However, the localization length, ξ ∼ Nl, in quasi-1D systems (those with multiple quantum channels N), increases due to an enhanced number of final states for scattering [18,19]. Correspondingly, it has been shown that a single parameter—the conductance G—determines whether a conductor of length L is regarded as metallic or insulating with a universal crossover at a conductance G 0 ∼ e 2 =h, where ξ ∼ L [18,20]. Here, we investigate this metal-insulator transition in highly doped Si∶P wires. Using STM as an atomic-precision fabrication tool to scale the wire width, we access both metallic and insulating regimes and study electron conduc- tion down to millikelvin temperatures and in the presence of gate-induced electric fields. Unique to Si∶P wires, extremely high carrier sheet densities (≃2 × 10 14 cm −2 ) allow the occupation of all six equivalent valleys of the silicon conduction band, leading to a sixfold enhancement of 1D channels at the quantum limit. Consequently, this allows metallic conduction over tens of nanometers in Si∶P wires, despite their atomic-scale diameters. STM images of two wire templates (W1) and (W2) [21] are shown in Fig. 1 [1,3,22] with high-resolution closeups in Figs. 1(c) and 1(d) recorded after hydrogen lithography on Sið001Þ − ð2 × 1Þ substrates (n-type, 1–10 mΩ cm). Both wires are aligned along h110i, parallel to the dimer rows of the surface reconstruction. Compared to earlier work on STM-patterned wires [23,24], improved tip bias- ing conditions (∼2.5 V, ∼25 nA) were used for complete removal of the hydrogen resist and clean definition of the PRL 113, 246802 (2014) PHYSICAL REVIEW LETTERS week ending 12 DECEMBER 2014 0031-9007=14=113(24)=246802(5) 246802-1 © 2014 American Physical Society