TESTING HIGH RESOLUTION ADCS USING DETERMINISTIC DYNAMIC ELEMENT MATCHING Beatriz Olleta, Hanjun Jiang, Degang Chen and Randall Geiger Department of Electrical and Computer Engineering Iowa State University Ames, IA 50011, USA ABSTRACT Dynamic element matching (DEM) is an effective approach to achieving good average performance in the presence of major mismatch in matching-critical circuits. This paper presents a deterministic DEM (DDEM) strategy for ADC testing that offers substantial reductions in testing cost. The approach is mathematically formulated and validated with simulation results that show the number of test vectors needed is comparable to what are currently used with standard code density linearity testing. It is demonstrated that the DDEM method can be used to accurately test ADCs with linearity that far exceeds that of the DAC used as a signal generator. This technique offers potential for use in both production test and BIST environments where high linearity devices are difficult to test and characterize. 1. INTRODUCTION Analog-to-Digital Converters (ADCs) are recognized as the world’s largest volume mixed-signal circuit [1]. With the increasing complexity of mixed-signal circuits and the emergence of low-cost mixed-signal IC market, testing of analog and mixed-signal circuits in general and ADCs in particular has become a challenging and costly process [2]. Built-in-self-test (BIST) structures offer potential solutions not only in terms of reduction of costs, but also in terms of its ability to test deeply embedded systems on a chip (SOCs) [3]. There have been many attempts in providing BIST solutions for ADCs, but most existing approaches in the literature have been aimed at duplicating a standard tester on chip [4] [5] which has better performance than the device under test (DUT). This becomes a significant challenge since such high performance signal generators require more design effort and more silicon area than the ADC to be tested. The DEM method has been used by many researchers to improve the performance of DACs [6-10]. Most researchers use these DACs on Delta-Sigma converters when high linearity is required. Although there have been concerns about using DEM to create “effectively linear” devices since the actual nonlinearity in the signal path is not removed, we believe the “averaged linearity” provided by DEM can be exploited to generate “effectively linear” stimulus signals for ADC testing. This approach allows the signal generator to be realized with a not-so- accurate DAC, hence eliminating the need of large silicon area and reducing the cost of the test signal generator. In a preliminary study, a test strategy was introduced to use random DEM in a highly-nonlinear DAC to test low-resolution ADCs [11]. A new DDEM testing technique was also introduced and compared with the random DEM testing approach when a low accuracy DAC is used to characterize/test an ADC with higher linearity in [12]. In this work the DDEM algorithm is explained in detail with mathematical proof of its behavior. Also simulations for high resolution ADC characterization using DDEM are shown in this work. This paper is organized as follows. Details are presented in Section 2 about both the DDEM implementation, along with mathematical derivation and algorithm description. In Section 3 simulation results for high resolution ADCs are shown and discussed. Section 4 summarizes this work. 2. DDEM METHOD FOR THERMOMETER CODED DACS A current steering DAC can be thermometer coded, binary coded or their combination. To get started, the DDEM method was applied to a thermometer coded DAC. Suppose the DAC has n- bit resolution, then it has 2 n -1 current source elements. The DAC structure is shown in Figure 1.                 1 2 3 4 5 6 7                 1 2 3 4 5 6 7                1 2 3 4 5 6 7 Figure 1: A 3-bit current mode thermometer-coded DAC The deterministic method deterministically picks the current sources to be switched on. The pattern used attempts to distribute the sources to be switched on in a way that all sources are used almost uniformly. As explained in [11] and [12], p represents the number of samples to be generated for each DAC input word. The following deterministic DEM switching scheme (Cyclic Switching Sequence) was applied to the DAC current sources: 1. All current sources are arranged conceptually along a circle so we can visualize the wrapping effect (physical layout of the current sources can be a rectangular array). p starting I - 920 0-7803-8251-X/04/$17.00 ©2004 IEEE ISCAS 2004 ➠ ➡