Compact, very low voltage, temperature-independent reference circuit P.S. Crovetti and F. Fiori Abstract: A compact, very low voltage, temperature-independent reference circuit, which is based on the thermal properties of bipolar junction transistors in the saturation region is presented. The new circuit operates from a minimum power supply of less than 1V and provides a reference voltage with a nominal thermal drift of 30 ppm/8C in the temperature range between 240 and 1108C. The proposed circuit has been integrated on silicon by a 0.35 mm CMOS technology and a reference voltage with a measured untrimmed thermal drift of 100 ppm/8C has been reported. The new voltage reference occupies a silicon area of only 3,500 mm 2 , shows a power consumption of ,30 mW and its DC power supply rejection is better than 65 dB. 1 Introduction The decrease of power supply voltages, imposed by geometrical scaling in ultra-deep submicron (UDSM) CMOS technology, has brought about new challenges in analogue integrated circuit (IC) design. In present-day ICs, in particular, analogue functions must be implemented by cells that operate from a power supply voltage of 1 V or less and most standard analogue circuit topologies do not fulfill this requirement. As a consequence, the development of very low voltage analogue cells has become one of the main issues in present-day and future analogue micro- and nanoelectronics. Traditional bandgap circuits [1–3] are not suitable to provide accurate voltage and current references in a very low voltage (,1V) environment. Therefore, new low voltage and very low voltage temperature-compensated reference circuits have been proposed in the literature over recent years [4–15]. The accuracy over temperature of low-voltage reference circuits is sometimes worse than traditional bandgap topologies and most of them are par- ticularly complex and area consuming. A novel very low voltage (,1 V), very compact reference circuit, which exploits the thermal properties of bipolar junction transistors (BJTs) in the saturation region is now presented. The new circuit, which provides a temperature independent voltage reference with a nominal thermal drift of 30 ppm/8C, has been integrated on silicon, and a reference voltage with a measured untrimmed thermal drift of 100 ppm/8C has been reported. 2 Thermal compensation technique The proposed very low voltage, temperature-independent reference circuit employs a novel thermal compensation technique based on the properties of BJTs in the saturation region. In this section, the proposed technique is illustrated on the basis of the schematic in Fig. 1a. More precisely, it is shown that the different thermal properties of the base-to-emitter voltage (V BE ) and the collector-to-emitter voltage (V CE ) of the bipolar transistor Q1 in Fig. 1a, which is biased in the saturation region by the constant- current source I 0 and by resistors R 1 and R 2 , can be exploited to obtain a first-order or a second-order temperature-independent reference voltage V OUT . After a short presentation of the Ebers–Moll model, which is employed to describe the operation of a BJT, the expression of the output voltage V OUT is derived, its thermal drift is evaluated and finally the design equations that should be satisfied to achieve first-order and second-order temperature compensation are presented. 2.1 BJT model In the proposed derivation, the bipolar transistor Q1 is described by the Ebers–Moll model [16, 17] and the BJT collector (I C ), emitter (I E ) and base (I B ) currents are assumed to be expressed as I C ¼ a F I 1  I 2 I E ¼ I 1  a R I 2 I B ¼ I E  I C ð1Þ where a F and a R are the forward and reverse current gains and I 1 ¼ I SE ðe V BE =V T  1Þ I 2 ¼ I SC ðe V BC =V T  1Þ ð2Þ where V BE and V BC are, respectively, the base – emitter and base – collector voltages, V T ¼ kT/q is the thermal voltage (k is Boltzmann’s constant, T is the absolute temperature and q is the electron charge) and I SE and I SC are the reverse saturation currents of the base-to-emitter and of the base-to-collector junctions, respectively. On the basis of (1) and (2), the equivalent circuit of a BJT transistor in the dashed rectangle of Fig. 1b is considered hereafter. Even though the Ebers–Moll model is rather simple and does not include second-order effects (high injection level effect, Early effect, and so on [16]), it is sufficiently accurate # The Institution of Engineering and Technology 2007 doi:10.1049/iet-cds:20050373 Paper first received 16th December 2005 and in revised form 19th June 2006 The authors are with the Dipartimento di Elettronica, Politecnico di Torino, Turin, corso Duca degli Abruzzi, 24, I-10129, Italy E-mail: paolo.crovetti@polito.it IET Circuits Devices Syst., 2007, 1, (1), pp. 63–72 63