A Novel MIM-Capacitor-Based 1-GS/s 14-bit Variation-Tolerant Fully-Di®erential Voltage-to-Time Converter (VTC) Circuit ¤ Abdullah El-Bayoumi †,§, ** , Hassan Mostafa †,‡,¶ and Ahmed M. Soliman †,|| † Electronics and Electrical Communications, Engineering Department, Cairo University, Giza, 12613, Egypt ‡ Center for Nanoelectronics and Devices, AUC and Zewail City of Science and Technology, New Cairo, Egypt § abdullah.elbayoumi@pg.cu.edu.eg ¶ hmostafa@uwaterloo.ca || asoliman@ieee.org Received 16 May 2016 Accepted 12 October 2016 Published 5 December 2016 Time-based Analog-to-Digital Converter (TADC), plays a major role in designing Software- De¯ned Radio (SDR) receivers, at scaled CMOS technologies, as it manifests lower area and power than conventional ADCs. TADC consists of 2 major blocks. The input voltage is con- verted into a pulse delay using a Voltage-to-Time Converter (VTC). In additions, the pulse delay is converted into a digital word using a Time-to-Digital Converter (TDC). In this paper, a novel fully-di®erential VTC based on a new methodology is presented which reports a highly- linear design. A metal-insulator-metal (MIM) capacitor as well as a dynamic calibration tech- nique based on a set of large-sized capacitor-based voltage dividers circuits are utilized to automatically compensate the Process-Voltage-Temperature (PVT) variations. Moreover, the layout design is introduced. The proposed design operates on a 1 GS/s sampling frequency with a supply voltage of 1.2 V. After calibration, simulation results, using TSMC 65 nm CMOS technology, report a 1.42 V wider dynamic range due to the di®erential mechanism with a 3% linearity error. This design achieves a resolution up to 14 bits, a 0.07 fJ/conversion FOM, a 229 m 2 area and a 0.25 mW power. The simulation results are compared to the single-ended VTC results and the state-of-the-art analog-part ADCs results to show the strength of the proposed design. Keywords: Nanometer CMOS technology; software de¯ned radio; voltage-to-time converter; calibration techniques; process-voltage-temperature variations; metal-insulator-metal capaci- tor; e®ective-number-of-bits; linearity; fully-di®erential design. *This paper was recommended by Regional Editor Piero Malcovati. **The author is currently with Valeo InterBranch Automotive Software (VIAS) Egypt, Giza, Egypt. Journal of Circuits, Systems, and Computers Vol. 26, No. 5 (2017) 1750073 (35 pages) # . c World Scienti¯c Publishing Company DOI: 10.1142/S0218126617500736 1750073-1 J CIRCUIT SYST COMP Downloaded from www.worldscientific.com by Dr. Ahmed Soliman on 01/01/17. For personal use only.