International Journal of Power Electronics and Drive Systems (IJPEDS) Vol. 13, No. 3, September 2022, pp. 1548~1557 ISSN: 2088-8694, DOI: 10.11591/ijpeds.v13.i3.pp1548-1557  1548 Journal homepage: http://ijpeds.iaescore.com Performance analysis of capacitor voltage balancing in modular multilevel converter by sorting algorithm Ali Salam Al-Khayyat 1 , Amel Ahmad Ridha 2 , Haider Fadel 1 1 Department of Electrical and Electronics Engineering, Faculty of Engineering, Thi-Qar University, Nasiriyah, Iraq 2 Department of Electronics and Communication Engineering, Faculty of Engineering, University of Kufa, Kufa, Iraq Article Info ABSTRACT Article history: Received Apr 22, 2022 Revised Jun 3, 2022 Accepted Jun 27, 2022 Due to the modularity of modular multilevel converter (MMC), therefore it has been considered as a substitute for the diode-clamp multilevel inverter in applications of high-voltage high-power. Where it can obtain any level of voltage without imposing complexity on the control system. This study analyses in detail the operation principle and balances the capacitor voltage of sub-module (SM) in modular multilevel converter by sorting algorithm. The output voltage control and capacitor voltage balancing technique are confirmed by MATLAB/Simulink and the obtained result has been discussed, where the capacitor voltage of the sub-module has controlled within the acceptable deviation limit, which is 5-10%. In addition, the circulating current has been controlled and reduced. Keywords: Capacitor voltage balancing Conventional sorting algorithm Modular multilevel converter PWM Sub-module This is an open access article under the CC BY-SA license. Corresponding Author: Ali Salam Al-Khayyat Department of Electrical and Electronics Engineering, Faculty of Engineering, Thi-Qar University Main Campus, Iraq Email: ali-al-khayyat@utq.edu.iq 1. INTRODUCTION The modular multilevel converter (MMC) considers a novel version of power electronic converters. The schematic diagram of MMC is shown in Figure 1(a). It is made up of three identical arms, which could be named phases or legs, they are connected in a parallel manner and fed by DC voltage source   . Each phase has 2n sub-modules (SM) that are identical in each arm (phases). The inverter output is taken from the middle point of each leg. The diagram of the sub-module is illustrated in Figure 1(b), where the circuit is built by two IGBTs with a diode connected antiparallel to each switching device, and there is a capacitor, which is charged to the voltage   . 2. OPERATING PRINCIPLE The switching devices IGBT of the Sub-module are turned on in opposite direction, where if T 1 is ON, T 2 is OFF and vice versa. Hence, the terminal voltage V xy =V c . On the other hand, when T 1 is OFF and T 2 is ON, the voltage V xy =0. Therefore, the semi-phase voltage V a1 or V a2 would vary from 0 to nV c . The capacitor voltage value V c . should be equal to    ⁄ . The sub-modules are controlled in such a way, that in one arm the n sub-modules are in an active state at any instant [1]–[5]. Thus, the voltage of the semi-phase changes from 0 to   . The sinusoidal modulation technique is used for operating the switching devices. Therefore, the reference voltage used for operating phase A (upper and lower semi-phase) is given by: