Neural Networks Letter A subthreshold MOS circuit for the Lotka–Volterra neural network producing the winners-share-all solution T. Asai a, * , T. Fukai b,c , S. Tanaka c a Department of Electrical and Electronic Engineering, Toyohashi University of Technology, Hibarigaoka 1-1, Tempaku-cho, Toyohashi, Aichi, 441-8580, Japan b Department of Electronics, Tokai University, Kitakaname 1117, Hiratsuka, Kanagawa, 259-1207, Japan c Laboratory for Neural Modeling, Brain Science Institute, The Institute of Physical and Chemical Research (RIKEN), 2-1, Hirosawa, Wako, Saitama 351-0198, Japan Received 22 July 1998; received in revised form 9 September 1998; accepted 9 September 1998 Abstract An analog MOS circuit is proposed for implementing a Lotka–Volterra (LV) competitive neural network which produces winners-share- all solutions. The solutions give multiple winners receiving large inputs and are particularly useful for selecting a set of inputs through ‘‘decision by majority’’. We show that the LV network can easily be implemented using subthreshold MOS transistors. Results of extensive circuit simulations prove that the proposed circuit does exhibit a reliable selection compared with winner-take-all circuits, in the possible presence of device mismatches. These results pave a way to future implementation on a real device.  1999 Elsevier Science Ltd. All rights reserved. 1. Introduction The winner-take-all (WTA) competition provides a way to select the input of upmost importance (Cohen & Gross- berg, 1983; Majani et al., 1989, 1989; Yuille, 1989; Wolfe et al., 1991; Kaski & Kohonen, 1994; Taylor & Alavi, 1995). The result of competition is typically represented by the activation of a single neuron which receives the largest input. The WTA competition, however, does not suit for an analog circuit implementation since the selection of a single winner may easily suffer from noise in inputs, partial destructions of the circuits or deviations in physical parameters of a group of equally designed devices (Lakshmikumar et al., 1986; Pelgrom et al., 1989). A Lotka–Volterra (LV) neural network, which was recently derived from the membrane dynamics of compet- ing neurons, possesses three types of steady-state solutions (Fukai & Tanaka, 1997). Those solutions are classified as the WTA, winners-share-all (WSA) and variant winner- take-all (VWTA). The WSA solution gives multiple winners in the order of magnitudes of external inputs. The number of winners can easily be adjusted by a single para- meter in the model. The selection of winners for WTA and WSA cases does not depend on initial values of neuron variables, whereas that for VWTA case does. Among those solutions, the WSA solution can be used to reduce the influence of the noise and device mismatches of the analog circuits if an external signal is selected by multiple winners. In this letter, we propose a MOS circuit producing the WSA solution of the LV networks for exploring a possible solution to the difficulties in the matching analog devices. Since the MOS transistors in the proposed circuit operate in a subthreshold region, the electric power dissipation from the circuit is very small. The low power dissipa- tion is critical for realizing a large scale circuit. In order to examine the influences of device mismatches on the circuit’s performance, we conduct extensive simula- tions of the proposed LV circuit with Simulation Program of Integrated Circuit Emphasis (SPICE). The implementa- tion on a real device is reported elsewhere (Asai et al., 1997). 2. The Lotka–Volterra competitive neural network The LV equation which describes competitive behavior among N identical neurons is given as (Fukai & Tanaka, Neural Networks 12 (1999) 211–216 PERGAMON Neural Networks NN 1272 0893-6080/99/$ - see front matter  1999 Elsevier Science Ltd. All rights reserved. PII: S0893-6080(98)00121-X * Corresponding author; e-mail: asai@postone.com