0093-9994 (c) 2019 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information. This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TIA.2019.2933378, IEEE Transactions on Industry Applications > 2018-IPCC-0676 < 1 Abstract— Multi-Level Inverters (MLIs) are playing a pivotal role in the power sector with potential applications such as interfacing renewable energy sources with the grid and several industrial drive applications. MLIs with a smaller number of switching devices are more promising due to their compact size, reduced cost and higher efficiency compared to their traditional counterparts. This paper, therefore, presents a new three-phase seven-level inverter. This topology is a combination of two cascade-connected two-level Voltage Source Inverters (VSIs) and H-bridge cells with flying capacitors (FCs). This paper presents the operating principle and the balancing technique for the DC- link capacitors and FCs. The generation of various output voltage levels and the limitation of the Sinusoidal Pulse Width Modulation (SPWM) control for FC voltage balancing is also presented. The number of components in the proposed circuit configuration and their voltage ratings are considerably lower compared to the recently proposed topologies. The behavior of the proposed circuit configuration is first assessed with simulation studies and is then tested with a laboratory prototype. The simulation and experimental results validate the effectiveness of the proposed topology and the voltage balancing technique. Index Terms— Three-level inverter, capacitor voltage balancing, flying capacitor, multilevel inverter, medium voltage. I. INTRODUCTION ONTEMPORARY research on MLIs aims to improve power circuit configurations to obtain higher efficiency, reliability, spectral performance and operability from high-voltage DC input. To this end, attempts are being made to reduce the device count, as it would directly influence the aspects of cost, efficiency and reliability. With MLIs, the higher output voltage is derived from voltage sources and power semiconductor switching devices of lower voltage ratings. MLIs also synthesize stepped output voltage waveforms, which are close to the sinusoidal wave increasing the spectral quality. Manuscript received ; revised ; accepted .(Corresponding author: Kirubakaran Annamalai.) The authors are with the Department of Electrical Engineering, National Institute of Technology Warangal, Warangal - 506004, India (e-mail: abhigate4ever@gmail.com; kiruba81@nitw.ac.in; sekhar@nitw.ac.in). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier . MLIs are likely to be used extensively for large capacity power generation using renewable energy sources [1-3]. The lower voltage and power ratings of photovoltaic and fuel cells can easily be connected in series and parallel to increase the power and voltage levels for the grid-connected applications. MLIs also facilitate to handle large DC-link voltages with reduced device stress and reduced harmonics for high and medium voltage applications. The most significant topologies pertaining to MLIs are (i) Neutral Point Clamped (NPC), (ii) Flying Capacitor (FC) and (iii) Cascaded H-Bridge (CHB) inverters [4-8]. These topologies are well suited for medium and high voltage applications. However, these topologies have restricted applicability for relatively lower ratings due to their inherent drawbacks such as the requirement of more clamping diodes and FCs in NPC and FC converters respectively. The FC topology can be used for higher power levels with the aid of auxiliary voltage balancing circuits or modified control schemes. The requirement of separate DC sources for each H- bridge in CHB leads to more components for the increased number of levels and leads to complexity in control. In order to balance the DC-link capacitor voltages, an active front end boost converter with an additional balancing circuit is presented in [9]. Recently, a novel 6-level inverter using two- level cell and three-level FC cell is proposed in [10]. However, it demands additional circuitry to provide unequal DC-link capacitor voltages leading to higher component count, bulkiness and reduced efficiency. Many novel symmetrical, asymmetrical and hybrid converters have been reported in the literature to overcome the limitations of the conventional topologies [11-13]. Among these, asymmetrical MLIs with unequal voltages gives higher output levels compared to the symmetrical configurations. However, these topologies demand more DC sources compared to NPC and FC inverters. Replacing these DC sources with capacitors and natural balancing in voltage control will reduce the overall size and cost of the system. However, these topologies result in poor response during the transient conditions. A five-level inverter topology, which overcomes these limitations is presented in [14], which consists of a 3-level (3L) Active Neutral Point Clamped (ANPC) converter with FC along with voltage balancing technique. Another Phase Shifted-PWM with a proportional controller is developed for a 3-phase five-level FC-MLI to balance the FC voltages during the transient states [15]. A Seven-Level VSI with a Front-end Cascaded Three-Level Inverter and Flying Capacitor fed H-Bridge Tirupathi Abhilash, Kirubakaran Annamalai Senior Member, IEEE, Somasekhar Veeramraju Tirumala, Member, IEEE C