71 Proc. of The Sixth Intl. Conf. On Advances In Computing, Control And Networking - ACCN 2017 Copyright © Institute of Research Engineers and Doctors, USA .All rights reserved. ISBN: 978-1-63248-117-7 doi: 10.15224/ 978-1-63248-117-7-16 2RC ADC for Massive Analog Signal Acquisition José M. Quero and Paula Roldán Abstract—There are applications that demand the simultaneous acquisition of a very large number of analog signals. This is the case when digital electronics circuits are connected to neural systems at very low level. In this paper, an ADC implemented with only two external resistors and one capacitor is presented. A description of this circuit is provided, including a detailed mathematical analysis of the behavior and its limitations. A circuit design procedure is applied to a real case using discrete components, and it is validated via simulation to demonstrate its performance. Keywords—ADC, biological interfaces, FPGA, programmable devices. I. Introduction The development of large programmable device such as FPGA has allowed the massive processing of digital data. These digital processors have hundreds of I/O digital pads for its external interconnection. However, these devices seldom include ADC in its core, and if so, the number of these converters is several order of magnitude lower than the number of gates that are integrated. There are applications that demand the simultaneous acquisition of a very large number of analog signals. This is the case when digital electronics circuits are connected to natural systems at very low level, requiring a complex analog interface to massively translate biological signals into digital ones. A very clear example is the study of mammalian neural networks. In this case, a very large set of electrodes (MEA) have an intracellular or extracellular connection with the cells and capture their voltage potentials [1]. Although the use of fast and/or accurate ADCs is mandatory in many applications, when dealing with biological interfaces, it is often unnecessary. In this kind of applications, the number of captured signals is more important than the quality or speed of the A/D conversions, as they are relatively slow and only qualitative information is needed. For these reasons, a compact ADC is needed when massively connecting digital devices to such Biosystems. In other application fields, such as in space, robustness is a must, and therefore minimal implementations are valuable. Several already proposed schemes includes an external analog comparator or the use of stochastic logic for the implementation of an ADC [2]. José M. Quero Dpto. Ingeniería Electrónica Universidad de Sevilla Paula Roldán Dpto. Ingeniería Electrónica Universidad de Sevilla Spain In this paper, an ADC implemented only two external resistors and one capacitor is presented. In next sections, a description of this circuit is provided, including a detailed mathematical analysis of the behavior and limitations. A circuit design procedure is applied to a case using discrete components, and it is validated via simulation and experimentation to demonstrate its performance. II. 2RC ADC A. Circuit description The proposed 2RC ADC only uses two resistors and one capacitor as presented in Fig. 1. The principle of functioning is similar to a one-slope ADC [3]. Figure 1. 2RC ADC Scheme. A digital oscillator generates a square waveform with a fixed frequency f osc . This digital signal is combined with the input voltage V in to be converted, by using R osc and R in . The resulting voltage is integrated by capacitor C, whose voltage V c is applied to a digital input pad. When the voltage V c is above the threshold voltage of the input pad, V con becomes a high level signal. Notice that the higher V in , the longer the time that V c will be above the gate threshold, and therefore the V com pulse will be longer. This pulse will activate a counter, that will provide a digital representation of V in when it stops. If just an inverter gate is used as an input pad, it may oscillate due to the application of a continuous input voltage that is close to the unique threshold value for 0 to 1 and 1 to 0 transitions. This is why it is advisable to use a Schmitt Trigger inverter as an input pad. From now on, V H and V h will represent the low to high and high to low threshold voltages of the input pad that performs the comparison, respectively. B. Mathematical modelling The waveforms generated by the proposed circuit are depicted in Fig. 2. When V osc is high or low, the capacitor is charged or discharged with a maximum or minimum