Analysis of eects of interface-state charges on the electrical characteristics in GaAs/GaN heterojunctions Shoji Yamajo, Jianbo Liang, and Naoteru Shigekawa* Graduate School of Engineering, Osaka City University, Osaka 558-8585, Japan *E-mail: shigekawa@elec.eng.osaka-cu.ac.jp Received June 27, 2017; accepted September 21, 2017; published online December 28, 2017 Electrical properties of p + -GaAs/n-GaN and n + -GaAs/n-GaN junctions fabricated by surface-activated bonding are investigated by measuring their capacitancevoltage (CV ) and currentvoltage (IV ) characteristics. The dierence between their at-band voltages (0.17 eV), which are extracted from CV measurements, disagrees with the ideal value (1.52 V), suggesting that the Fermi level should be pinned at the bonding interface. The CV characteristics of the two junctions are calculated by assuming that the Fermi level is pinned at the interface. The measured CV characteristics quantitatively agree with modeled ones obtained by assuming that the interface state density and conduction band discontinuity are 1.5 ' 10 14 cm %2 eV %1 and 0.63eV, respectively. The eective heights of barriers at interfaces, which we estimate by analyzing dependences of IV characteristics on the ambient temperature, are >1020 meV for the two junctions at room temperature. This suggests that the transport of carriers is dominated by tunneling through interface states. © 2018 The Japan Society of Applied Physics 1. Introduction Gallium nitride (GaN) is a promising component of next- generation power devices because of its high breakdown voltage, high thermal conductivity, and the high physical and chemical stabilities. 1,2) In contrast, GaAs has superior electron transport characteristics and is widely used in high- frequency devices because of its matured growth and process technologies. 3) Hence, the integration of GaAs and GaN enables us to fabricate unique electron devices for high- power and high-speed applications, which are otherwise unobtainable by either of the single materials. Here, we note that the energy band alignment of GaAs=GaN must be claried so as to design devices using GaAs=GaN hetero- junctions. Several authors reported on the growth of GaAs= GaN heterojunctions. 46) However, it is still dicult to epitaxially grow GaN layers on GaAs substrates. The quality of epitaxial layers was not satisfactory because of large dierences in lattice constants and crystal structure between GaAs and GaN. 710) Furthermore, it was also reported that the nitrogen could diuse across the GaAs=GaN interface during growth. 11) The resultant interfacial roughening of the GaAs= GaN interface together with the high dislocation density and other crystal defects was observed by scanning transmission electron microscope (STEM). 11) One way to overcome these diculties is direct wafer bonding processes such as wafer-fused bonding and surface- activated bonding (SAB). 3,1215) In wafer bonding, substrates are bonded to each other after surface treatment by chemical agents or fast atom beams. Hence, direct wafer bonding is assumed to enable us to fabricate heterojunctions easily. However, high-temperature annealing is necessary to form junctions in wafer-fused bonding. 16,17) Such a high-temper- ature process might cause the degradation of crystal qualities due to the evaporation of arsenic atoms or mechanical defects due to the dierence between the thermal expansion coecients of bonded substrates. In SAB, substrate surfaces are activated by the fast atom beams of Ar prior to bonding without heating. These methods have widely been used for fabricating various junctions, such as Si=Si, 18,19) Si=SiC, 20) GaAs=Si, 21) and InGaP=Si. 22) However, it has been reported that interface states with high densities exist at the bonding interface, which is assumed to be due to the formation of interlayers or the imperfection of the interface. 23,24) Lian et al. fabricated GaAs=GaN pn heterojunction diodes by wafer-fused bonding and characterized their electrical properties by capacitancevoltage (CV ) and temperature dependent currentvoltage (IV ) measurements. 17) They presumed that the band alignment was of type II. Kim et al. also reported on GaAs=GaN pn heterojunction diodes, 3) which were fabricated by bonding GaAs and GaN substrates to each other after their surfaces were activated by the O 2 plasma. They suggested that the band alignment was of type I. Given that the electron anities of GaAs and GaN are reportedly 4.07 and 4.1 eV, respectively, their conduction band discontinuity should be 0 eV in the simplest model. The disagreement in the previously reported two band alignments (type I vs type II), consequently, suggests that a dipole is formed at the GaAs=GaN interface aecting the apparent band alignments. Such a dipole should likely be sensitive to the process of forming the GaAs=GaN interface. The standard model for heterointerfaces 25) predicts that the magnitude of the dipole is sensitive to the charge neutrality level (CNL) 26) of the adjacent layers. It is also notable that the band bending in each layer depends on the interface charge, or the density of interface states (D it ). The impacts of the interface states on the electrical properties of GaAs=GaN junctions as well as the band alignments, however, have not yet been fully understood. We previously reported on CV characteristics of p + - GaAs=n-GaN junctions. 27) In this study, we fabricated p + - GaAs=n-GaN and n + -GaAs=n-GaN junctions by SAB. The electrical properties of the respective junctions were inves- tigated by measuring their CV and IV characteristics. We analyzed the eects of charges in the interface states on the CV characteristics of p + -GaAs=n-GaN and n + -GaAs=n-GaN junctions by using the CNL model. The band alignment of the GaAs=GaN interface was estimated from analysis results. Furthermore, the eective barrier heights for the two junctions were estimated using the dependences of their IV characteristics on the ambient temperature. 2. Experimental methods We epitaxially grew p + - and n + -GaAs layers on p-GaAs(100) Japanese Journal of Applied Physics 57, 02BE02 (2018) https://doi.org/10.7567/JJAP.57.02BE02 REGULAR PAPER 02BE02-1 © 2018 The Japan Society of Applied Physics