International Journal of Embedded Systems and Applications (IJESA) Vol.2, No.3, September 2012 DOI : 10.5121/ijesa.2012.2304 37 Sanjay M Trivedi 1 , B. S. Raman 2 , Pinal Engineer 3 and Dr. Mihir Shah 4 1 Scientist/Engineer, Space Applications Centre (ISRO), Ahmedabad, India sanjay@sac.isro.gov.in 2 Head MSCED, Space Applications Centre (ISRO), Ahmedabad, India.. bsraman@sac.isro.gov.in 3 A. P., Sardar Vallabhbhai National Institute of Technology Surat, India. pinalengineer@gmail.com 4 A. P., Vishvakarma Govt. Engg.College Chandkheda, Ahmedabad, India. mihirec@gmail.com ABSTRACT The objective of this paper is to present the architecture design and implementation of a software defined hardware module called Control Signal Generator (CSG) for pulsed RADAR (Radio Detection and Ranging) application. It is a digital, programmable, application-specific control timing signal generator for Disaster Management Synthetic Aperture Radar (DM-SAR)[1]. This module is a slave controller which receives command through asynchronous serial interface and generates programmable timings. Architecture evolved and the module is developed using Very High Speed Integrated Circuit (VHSIC) Hardware Description Language (VHDL)[2] and successfully implemented on Xilinx Field Programmable Gate Array (FPGA) XCV600-6HQ240 [3]. Keywords Field Programmable Gate Array, VHDL, RADAR, Control Signal Generator, TSG, PRI. 1. INTRODUCTION The Synthetic Aperture Radar (SAR) is pulsed radar for on-demand imaging under all-weather conditions for a variety of purposes and the DM-SAR project is aimed at realizing a flexible and configurable product for use in disaster management applications. The central controller of the radar unit called the Radar Controller is the control-center of the system and sports a microcontroller along with hardware resources. It performs all system setup, command, control applications and also provides user interface through a serial link to an operator console. The fast-advancing area of software defined hardware enabled by the exponential development per-device resources in field-programmable gate array (FPGA) technology has made inroads into most electronic design environments. The developmental flexibility and the level of design automation possible with these devices have made the use of FPGAs very convenient and productive. Complex radar control electronics is no exception; in fact it is a great beneficiary of the advantages offered by FPGAs [4] in realizing complex timing and logical interlocks often required in such systems.